News Posts matching #Milan-X

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AMD Posts November Investor Presentation

AMD later this month is preparing to address investors as part of a yet-unknown event. The company typically hosts Financial Analyst Day events around Q1-Q2, and goes to the investors with substantial material on the current state of the organization, the products on offer, what's on the horizon, and how it could impact the company's financials. An alleged presentation related to the November 2021 event was leaked to the web. The presentation provides a guided tour of the entire product portfolio of the company, spanning server processors, compute accelerators, consumer graphics, some client processors, and the semi-custom business.

The presentation outlines that the company has so far successfully executed its roadmaps for the client-CPU, server-CPU, graphics, and compute-accelerator segments. In the client CPU segment, it shows a successful execution up to 2021 with the "Zen 3" microarchitecture. In the server space, it mentions successful execution for its EPYC processors up to "Zen 3" with its "Milan" processors, and confirms that its next-generation "Zen 4" microarchitecture, and its sister-architecture, the "Zen 4c," will be built on the 5 nm silicon fabrication node (likely TSMC N5). The presentation also details the recently announced "Milan-X" processor for existing SP3 platforms, which debuts the 3D Vertical Cache technology, bringing up to 96 MB of L3 cache per CCD, and up to 768 MB of L3 cache (804 MB L1+L2+L3 cache) per socket.
Update 10:54 UTC: The presentation can now be found on the AMD Investor Relations website.

AMD Stock Jumps 10% on Monday, Propelled by Meta (Facebook) Deal

AMD on Monday made several major announcements covering different parts of its enterprise product roadmap. These included the 3rd Gen EPYC "Milan-X" processors with 3D Vertical Cache memory; Instinct MI200 CDNA2 compute accelerators, and announcements related to next-generation "Zen 4" based EPYC "Genoa" and "Bergamo" processors that come with core counts as high as 128. The company's stock rallied up to 12%, closing up 10%, which left many in the tech community scratching their heads. It turns out that the AMD-Meta deal has a profound impact on investors.

Meta, the holding company of Facebook covering all its businesses, aspires to be a major cloud solutions provider on par with Microsoft Azure, AWS, and Google Cloud. The deal could see Meta buying large stocks of AMD processors and compute accelerators to drive its next-gen server infrastructure. Sales of enterprise processors doubled year-over-year for AMD, and EPYC processors now account for 20% of the company's revenues.

AMD Accelerated Data Center Event Live Blog

AMD held its Accelerated Data Center Keynote address by CEO Dr Lisa Su today. The company made some big announcements for the enterprise space in this first major series of announcements by AMD after Intel's launch of its Alder Lake 12th Gen Core processors that set the tone for what's to come from Intel in the enterprise space (Xeon "Sapphire Rapids"). First up is the EPYC "Milan-X" line of server processors leveraging 3D Infinity Cache memory, a tripling in L3 cache amount, which the company claims significantly improves performance of memory-intensive applications. This should also give you an idea if any upcoming Ryzen desktop processor based on the refreshed chiplet could live up to its claim of "up to 15% gaming performance boost." The next-generation Instinct MI200 series GPU compute accelerators are equally important as they bring the CDNA2 compute architecture to market, establishing competition to NVIDIA's A-series Tensor Core processors, and Intel's upcoming "Ponte Vecchio" Xe-HPC accelerators.

AMD Could Use Infinity Cache Branding for Chiplet 3D Vertical Cache

AMD in its Computex 2021 presentation showed off its upcoming "Zen 3" CCD (CPU complex dies) featuring 64 MB of "3D vertical cache" memory on top of the 32 MB L3 cache. The die-on-die stacked contraption, AMD claims, provides an up to 15% gaming performance uplift, as well as significant improvements for enterprise applications that can benefit from the 96 MB of total last-level cache per chiplet. Ahead of the its debut later today in the company's rumored EPYC "Milan-X" enterprise processor reveal, we're learning that AMD could brand 3D Vertical Cache as "3D Infinity Cache."

This came to light when Greymon55, a reliable source with AMD and NVIDIA leaks, used the term "3D IFC," and affirmed it to be "3D Infinity Cache." AMD realized that its GPUs and CPUs have a lot of untapped performance potential with use of large on-die caches that can make up for much of the hardware's memory-management optimization. The RDNA2 family of gaming GPUs feature up to 128 MB of on-die Infinite Cache memory operating at bandwidths as high as 16 Tbps, allowing AMD to stick to narrower 256-bit wide GDDR6 memory interfaces even on its highest-end RX 6900 XT graphics cards. For CCDs, this could mean added cushioning for data transfers between the CPU cores and the centralized memory controllers located in the sIOD (server I/O die) or cIOD (client I/O die in case of Ryzen parts).
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