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Micron Ships Industry's First Quad-Level Cell NAND SSD

Micron Technology, Inc. has commenced shipments of the industry's first SSD built on revolutionary quad-level cell (QLC) NAND technology. Unveiled at Micron's 2018 Analyst and Investor Event, the Micron 5210 ION SSD provides 33 percent more bit density than triple-level cell (TLC) NAND, addressing segments previously serviced with hard disk drives (HDDs). The introduction of new QLC-based SSDs positions Micron as a leader in providing higher capacity at lower costs to address the read-intensive yet performance-sensitive cloud storage needs of AI, big data, business intelligence, content delivery and database systems.

As workloads evolve to meet the ever-increasing demands for real-time data insights and analytics, data centers increasingly need the capacity, speed, reliability and steady state performance that enterprise flash storage provides. Micron QLC NAND - reaching densities of 1 terabit with its next-generation 64-layer 3D NAND structure - is optimized to meet these demands and make SATA SSD performance and capacity more approachable than ever before.

Micron To Release QLC NAND-Based Drives in 2018 to the Server Environment

Micron has announced that they will be introducing QLC (Quad Level Cell) NAND-based, own brand drives for the server environment this year. The new QLC drives are expected to boost maximum storage density (and price per GB) closer to that of mechanical HDDs, which is why Micron is positioning drives based on this memory technology as data center-class SSDs for the nearline storage market. The company is positioning these drives as replacement options for 7,200 RPM HDDs for workloads that require heavy reads of stored information - thus offsetting QLC NAND's lower endurance when it comes to available maximum writes on the drives' cells.

It's a known trade-off when it comes to the NAND world: higher amounts of bits per cell to represent information means that there must be much increased accuracy when it comes to reading a given cell's voltage state. While SLC NAND only tracks two voltage states, MLC (2-bits per cell) tracks four voltage states, TLC doubles that to eight voltage states, and QLC doubles the ante again for a maximum 16 voltage states, where each voltage state represents data on the cell. Of course, with repeat writes and voltage changes, accuracy and capacity for the cell to maintain its given voltage tend to drop, which leads to incorrect information and thus corrupted data or those cells to be rendered inoperative. This is one of the reasons for manufacturers to include overprovisioning in their NAND-based solutions.

Marvell's Ready to launch QLC Controller Delivers 670K IOPS

QLC is the next big step in flash memory, with another bump in density increases and, crucially for consumers, revised, lower pricing for flash-based products that employ the new technology. We've already had a sneak peek at what QLC-based products can deliver - Intel's leaked SSD 660P employs QLC memory and is expected to deliver 1,800 MB/s in sequential read and up to 1,200 MB/s in sequential write speeds with 150,000 IOPS. Expect base drive capacities to increase - QLC being higher density would mean fewer NAND chips, but manufacturers want to keep the added performance of chip parallelism.

However, flash needs controllers to deliver its true potential, and Marvell has one up its sleeve. The new controller will eventually replace the NVMe 1.1 Eldora (88SS1093) used in some popular SSDs that are already shipping, such as Plextor's M9Pe, and the folks at Tom's hardware took a peek at it - running the current TLC memory, that is. The controller delivered over 670,000 IOPS and 3,500 MB/s in the demo, though there's no information on the density of the drive. But for those performance levels, it must've had a good amount of silicon. While not representative of final QLC memory performance of the controller, it's good to know that at least this part of the ecosystem is good to go. Now if only QLC was quick and hot off the presses, we could see a $100 512 GB SSD.

Intel SSD 760p and 660p Specifications and Pricing Listed Online

Autobuy, a popular online shopping site in Taiwan, recently listed Intel's upcoming 760p and 660p M.2 NVMe SSDs on their store. The SSD 760p will be manufactured under Intel's 64-layer 3D NAND technology and feature TLC (triple-level-cell) NAND. It's obviously the faster of the two with a sequential read speed up to 3,200 MB/s and a write speed up to 1,600 MB/s. The drive offers random access reads up to 350,000 IOPS and writes up to 280,000 IOPS. Intel will offer this model in capacities of 128 GB, 256 GB, 512 GB, 1 TB, and 2 TB. TigerDirect listed the pricing for them at $96, $120, $240, $448, and $893, respectively.

The SSD 660p is Intel's budget-friendly this time around. Therefore, it will use QLC (quad-level-cell) NAND despite being manufactured with the same technology as its older brother. This SSD can reach up to 1,800 MB/s in sequential read and up to 1,200 MB/s in sequential write speeds with random access read and write performance in the range of 150,000 IOPS. Surprisingly, Intel won't be offering this model in the 128 GB and 256 GB capacities. Instead, the lowest capacity model will start from 512 GB and make its way up to 2 TB. Unfortunately, pricing wasn't available at the time of this article.

Toshiba Unveils RC100 Series M.2 NVMe SSDs

Toshiba Memory America, Inc. (TMA), the U.S.-based subsidiary of Toshiba Memory Corporation, will be highlighting the use of its industry-leading BiCS FLASH 3D memory in several applications - including its new lineup of NVMe SSDs, the RC100 Series.

At CES, TMA is collaborating with its customers and technology partners to take on the future - together. Toshiba was the first company in the world[1] to announce 3D flash memory technology, which effectively addresses the processing, storage and management of the growing volume of data generated worldwide. Recent announcements see the company continuing to lead the industry forward, including the introduction of a 96-layer 512Gb die; the debut of the industry's first[2] flash memory device with quadruple-level cell (QLC) technology; and the addition of Through Silicon Via (TSV) technology. Already enabling the enterprise, data center, PC and mobile applications of today, TMA's BiCS FLASH has paved the way for the applications of tomorrow. In everything from artificial intelligence and virtual reality to a growing number of automotive applications (such as infotainment), high performance computing and the ever-expanding "internet of things," storage density needs will climb higher and higher - and BiCS FLASH was designed with this in mind.

Phison Also Looking to Introduce High performance E12 and S12 NAND Controllers

Phison isn't just a budget controller brand, as you well know, so in addition to their interesting, 2-channel NVMe NAND controller in the Phison E8, which should see products hitting retail in the following months, the company is also catering to the high performance crowds with the impressive E12 and S12 controllers. The E12 is definitely the star of Phison's new controller line-up - just look at those ratings of 3200 MB/s sequential read, 3000 MB/s sequential write, and 600K random read and random write IOPS. Naturally, those rated speeds should be taken with a measure of salt, as NAND type, its implementation and firmware tweaks all matter tremendously in extracting the best possible performance from high speed storage.

Contrary to the E8 budget Phison controller, the E12 will feature a full NVMe PCIe x4 interface, which allows for those speed ratings. The S12, on the other hand, is a more common SATA III controller, which means that its speeds of 550 MB/s sequential read and 530 MB/s sequential write are already hitting the interface's limits. Other than the interface and the rated speeds and IOPS, though, the specs are the same on these controllers: support for 3D NAND on MLC/TLC/QLC arrangements, 8-channel, LDPC, SmartECC, and End-to-End DPP support.

Samsung Readies 970 and 980 Series NVMe SSDs

At its Flash Memory Summit booth, Samsung revealed plans to launch new consumer-segment SSDs which succeed its current 960 EVO and 960 Pro series. Over 2017-18, the company is expected to launch the new 970 series and 980 series NVMe SSDs. Tom's Hardware predicts that Samsung could dispose of the "EVO" and "Pro" brand extensions to a static model number (such as 960 or 950). Samsung could tap into its current 3-bit per cell (TLC) 64-layer 3D V-NAND flash memory for the 970 and 980 series. With the company busy capacity-building for 4-bit per cell (QLC), the new SSD lines may not feature it, although Samsung is capable of surprising with aggressive launch cycles. As drives supporting the NVMe protocol, the 970 and 980 series could ship in modern form-factors, such as M.2 and U.2.

Toshiba's 768 Gb 3D QLC NAND Flash to Match TLC's Program/Erase Cycles

Not all news coming out of Toshiba is bad or somewhat bad. The Japanese giant still is one of the biggest players in the NAND semiconductor business, no matter the recent woes. Even more recently, though, Toshiba announced they had developed quadruple level cell NAND memory, which should improve density and, therefore, reduce the price/GB ratio on future consumer products, such as SSDs. However, each increase in the number of cell levels bring concerns regarding not only performance, but especially durability, since a higher number of states per cell increases the voltage steps that are applied to it (SLC NAND dealt with two voltage states, MLC with four, TLC with eight voltage states, and QLC will handle 16 of these.) This tends to make errors more common, and the cell's longevity to be compromised due to the amount of variation in its states, which means more powerful error correction techniques must be employed.
According to Toshiba, its 3D QLC NAND targets around ~1000 program/erase cycles, which is close to TLC NAND flash. This is considerably higher than the amount of P/E cycles (100 - 150) expected for QLC by the industry, which means the company has achieved what many thought difficult. Toshiba has begun sampling of its 3D QLC NAND memory devices earlier this month. everything points to mass production on late 2018, early 2019, though, which means we still have a long way to go until we see this technology implemented. This won't be the one to save us from escalating NAND prices; we'll have to look to other, more market and supply-and-demand based factors instead.

Toshiba Develops World's First 4-bit Per Cell QLC NAND Flash Memory

Toshiba America Electronic Components, Inc. (TAEC) today announced the latest generation of its BiCS FLASH three-dimensional (3D) flash memory. The newest BiCS FLASH device features 4-bit-per-cell, quadruple-level cell (QLC) technology and is the first 3D flash memory device to do so. Toshiba's QLC technology enables larger (768 gigabit) die capacity than the company's third-generation 512Gb 3-bit-per-cell, triple-level cell (TLC), and pushes the boundaries of flash memory technology.

Toshiba's new QLC BiCS FLASH device features a 64-layer stacked cell structure and achieves the world's largest die capacity (768Gb/96GB). QLC flash memory also enables a 1.5-terabyte (TB) device with a 16-die stacked architecture in a single package - featuring the industry's largest capacity. This is a fifty percent increase in capacity per package when compared to Toshiba's earlier announcement of a 1TB device with a 16-die stacked architecture in a single package - which also offered the largest capacity in the industry at the time.
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