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TSMC 5 nm+ Node Manufacturing Goes High-Volume in Q4, AMD one of the Major Customers

TSMC is working hard to bring the best silicon out there, with the company supplying many of the companies like NVIDIA, AMD, Huawei, and Apple - all customers who demand the latest and greatest when it comes to the silicon technology. According to sources close to DigiTimes, TSMC is expected to kick-off volume production of its next-generation 5 nm+ manufacturing node, which is an enhancement of the 5 nm node, as soon as Q4 of this year hits.

Update May 29th: The DigiTimes report indicates that TSMC is preparing the 5 nm+ node for AMD Ryzen 4000 "Vermeer" series of CPUs. Originally planned for using the 7 nm+ node, the CPUs are supposedly ported to a smaller node, providing better transistor performance and lower power consumption. The Ryzen 4000 series of desktop processors were planned for launching later this year, however, being that the new information provided by DigiTimes suggests 5 nm+ node could be used, we can expect to see Zen 3 based processors sometime in early 2021.

AMD 5th Gen Ryzen Desktop Possibly Codenamed "Warhol"

Earlier this week, we brought you a report about codenames of AMD processors that won't launch before 2022. It referenced "Raphael" being distant 5 nm "Zen 4" based successor to today's "Matisse." At the time, the codename for the 2021 release of AMD's mainstream desktop processor wasn't known. We're now getting a pointer as to what it is - "Warhol."

Named after American artist and filmmaker Andy Warhol, this processor combines CPU chiplets based on the "Zen 3" with a cIOD that retains PCI-Express gen 4.0, just like "Vermeer," but still qualifies as a new generation (and not a refresh). What's more, "Warhol" apparently sticks to a 7 nm-class silicon fabrication process. This means that "Warhol" could see AMD innovate on other fronts, such as leveraging an even more advanced version of TSMC's 7 nm node (such as N7+), to increase core counts over the chiplet that makes it to "Vermeer, "Genesis Peak," and "Milan."

AMD RDNA2 "Navi 21" GPU to Double CU Count Over "Navi 10"

AMD's RDNA2 graphics architecture, which sees real-time ray-tracing among other DirectX 12 Ultimate features, could see the company double the amount of stream processors generation-over-generation, according to a specs leak by _rogame. The increase in stream processors would fall in line with AMD's effort to increase performance/Watt by 50%. It may appear like the resulting SKUs finally measure up to the likes of the RTX 2080 Ti, but AMD has GeForce "Ampere" in its competitive calculus, and should the recent specs reveal hold up, the new "Navi 21" could end up being a performance-segment competitor to GeForce graphics cards based on the "GA104" ("TU104" successor), rather than a flagship-killer.

The RDNA2-based "Navi 21" GPU allegedly features 80 RDNA2 compute units amounting to 5,120 stream processors. AMD might tap into a refined 7 nm-class silicon fabrication node by TSMC to build these chips, either N7P or N7+. The die-size could measure up to 505 mm², and AMD could aim for a 50% performance/Watt gain over the "Navi 10." AMD could carve out as many as 10 SKUs out of the "Navi 21," but only three are relevant to the gamers. The SKU with the PCI device ID "0x731F: D1" succeeds the RX 5700 XT. The one bearing "0x731F: D3" succeeds the RX 5700, with a variant name "Navi 21 XL." The "Navi 21 XE" variant has a PCI ID of "0x731F: DF," and succeeds the RX 5600 XT.

TSMC 5 nm Fab in Arizona will Change Global Semiconductor Supply Chain: Report

TSMC has just recently announced that they will be building a semiconductor factory in the US, thanks to the pressure from Trump administration. The 5 nm Fab will be built in Arizona, with construction starting in 2021. It will be finished in the year 2024 when the plant will operate at a capacity of 20,000 wafers per month. This is not a high number as TSMC Fabs usually operate at a rate of 100-150K wafers per month, however, the amazing thing is the location of the Fab. The US Fab in Arizona is set to change the global landscape of the semiconductor supply chain, as per the latest report from DigiTimes Research.

Arizona is a place in the US where lots of companies are building semiconductors. Intel, Raytheon, Microchip, ON Semiconductor, VLSI, Freescale, NXP, STMicroelectronics, Honeywell, Marvel, Amkor, Philips, and Western Digital have their facilities there and Arizona can be considered one of the key places for semiconductor manufacturing in the US. With TSMC adding their manufacturing facilities to that list as well, there could be a change in the supplier ecosystem. In light of the need for TSMC 5 nm Fab, the world's leading OSAT (Outsourced Semiconductor Assembly and Test) suppliers may be encouraged to set up local production in Arizona to help TSMC with its plans. A lot of OSAT providers are headquartered in Taiwan, however, if there is a need, they are possibly going to build their manufacturing facilities in Arizona. This alone could change the way semiconductor manufacturing facilities are supplied, and the US could become a major center of OSAT providers.
TSMC HQ

SMIC Begins Mass-Production of 14nm FinFET SoCs for Huawei HiSilicon

Semiconductor Manufacturing International Corporation (SMIC), the state-backed Mainland Chinese semiconductor foundry, announced that it commenced mass-production of 14 nm FinFET SoCs for Huawei's HiSilicon subsidiary, a mere one month since Huawei shifting chip orders from TSMC to it. The company is manufacturing Kirin 710A is a revision of the original Kirin 710 SoC from 2018, built on SMIC's 14 nm node. The 4G-era SoC is capable of powering mid-range smartphones for Huawei's Honor brand, and uses an Arm big.LITTLE setup of Cortex A53 and Cortex A57 cores. This represents a major milestone not just for SMIC, but also Huawei, which has seen the company's isolation from cutting-edge overseas fabs such as TSMC. Much of Huawei's fate is riding on the success of SMIC's next-generation N+1 node, which purportedly offers a 57 percent energy-efficiency gain over 14 nm FinFET, rivaling sub-10 nm nodes such as 7 nm; enabling Huawei to build 5G-era SoCs.

TSMC Building a 5nm Fab in Arizona as the U.S. Government Gets Involved

It has become a matter of national strategy (or pride) to get TSMC to build a cutting-edge silicon fabrication facility on U.S. soil. Hot on the heals of a report in which TSMC denied it has any plans to build a fab in the U.S., we're learning from a Wall Street Journal that the world's largest independent semiconductor manufacturing company, will build a facility in the U.S. after all. Apparently TSMC will build a silicon fabrication facility in the state of Arizona. The fab will manufacture 5 nm-class chips, to begin with.

TSMC got around to drawing up plans to build a stateside facility after the "involvement" of the State- and Commerce Departments of the U.S. Government. The two are involved not just in coaxing TSMC, but also in the specifics of the planning to get them to the Grand Canyon state. The Donald Trump administration made significant national policy changes with manufacturing, in the wake of the COVID-19 pandemic causing significant wait times in getting silicon products from Asia to the US.

Update 01:25 UTC: TSMC made its U.S. fab plans official with an announcement. Press release and additional commentary below.

Fujitsu Completes Delivery of Fugaku Supercomputer

Fujitsu has today officially completed the delivery of the Fugaku supercomputer to the Riken scientific research institute of Japan. This is a big accomplishment as the current COVID-19 pandemic has delayed many happenings in the industry. However, Fujitsu managed to play around that and deliver the supercomputer on time. The last of 400 racks needed for the Fugaku supercomputer was delivered today, on May 13th, as it was originally planned. The supercomputer is supposed to be fully operational starting on the physical year of 2021, where the installation and setup will be done before.

As a reminder, the Fugaku is an Arm-based supercomputer consisting out of 150 thousand A64FX CPUs. These CPUs are custom made processors by Fujitsu based on Arm v8.2 ISA, and they feature 48 cores built on TSMC 7 nm node and running above 2 GHz. Packing 8.786 billion transistors, this monster chips use HBM2 memory instead of a regular DDR memory interface. Recently, a prototype of the Fugaku supercomputer was submitted to the Top500 supercomputer list and it came on top for being the most energy-efficient of all, meaning that it will be as energy efficient as it will be fast. Speculations are that it will have around 400 PetaFlops of general compute power for Dual-Precision workloads, however, for the specific artificial intelligence applications, it should achieve ExaFLOP performance target.
K SuperComputer

TSMC Says it Still Won't Build a Fab in the US

TSMC, as one of the largest silicon manufacturers in the world, has been subject to pressure from the Trump administration to build a Fab and manufacture silicon on US soil. The reasoning behind this is that the US government could order chips that are supposed to be used in military applications. For security reasons, they need to be manufactured on US grounds and "checked" by the US government. However, it seems like a Taiwanese company has no concrete plans to realize the building of the US Fab.

Thanks to the report of DigiTimes, TSMC has confirmed that they have resisted requests from the US government, and will not build a Fab on US soil for the government. They haven't dismissed the possibility of building one or silicon manufacturing facilities in the US completely. TSMC chairman Mark Liu has told DigiTimes previously that if the company wants to build a US Fab, it will do so because of consumer demand, not the government demand. And that is understandable. It is much easier to work with regular customers compared to the US government which would force a company to go through rigorous security levels to deliver chips.
TSMC HQ

TSMC 5 nm Customers Listed, Intel Rumored to be One of Them

TSMC is working hard to bring a new 5 nm (N5 and N5+) despite all the hiccups the company may have had due to the COVID-19 pandemic happening. However, it seems like nothing can stop TSMC, and plenty of companies have already reserved some capacity for their chips. With mass production supposed to start in Q3 of this year, 5 nm node should become one of the major nodes over time for TSMC, with predictions that it will account for 10% of all capacity for 2020. Thanks to the report of ChinaTimes, we have a list of new clients for the TSMC 5 nm node, with some very interesting names like Intel appearing on the list.

Apple and Huawei/HiSilicon will be the biggest customers for the node this year with A14 and Kirin 1000 chips being made for N5 node, with Apple ordering the A15 chips and Huawei readying the Kirin 1100 5G chip for the next generation N5+. From there, AMD will join the 5 nm party for Zen 4 processors and RDNA 3 graphics cards. NVIDIA has also reserved some capacity for its Hopper architecture, which is expected to be a consumer-oriented option, unlike Ampere. And perhaps the most interesting entry to the list is Intel Xe graphics cards. The list shows that Intel might use the N5 process form TSMC so it can ensure the best possible performance for its future cards, in case it has some issues manufacturing its own nodes, just like it did with 10 nm.
TSMC 5 nm customers

NVIDIA and HiSilicon Enter Top 10 Semiconductor Suppliers List

HiSilicon, a subsidiary company of Huawei, has officially entered the top 10 list of the semiconductor suppliers in the first quarter of 2020. This is a very important milestone for HiSilicon, as this shows just how big demand there is for its chips. Starting from smartphone chips going inside Huawei phones, server processors, and telecommunication equipment, HiSilicon has been busy pumping out designs at a very high rate. And now, thanks to the report of IC Insights, we have information that HiSilicon has become one of the biggest players in the industry.

Ranked at number 10 spot, HiSilicon is the first company from China that has entered this list. At the number nine spot is NVIDIA, which is also a new entry to the list. Thanks to the growth of 37% for the quarter, NVIDIA can hold number nine spot. In total, the top 10 of the semiconductor suppliers have climbed 16% on year in the first quarter of 2020, which is a very impressive result, counting in the current pandemic in the world.
Top 10 Semiconductor Suppliers TSMC Sales to HiSilicon

NVIDIA Underestimated AMD's Efficiency Gains from Tapping into TSMC 7nm: Report

A DigiTimes premium report, interpreted by Chiakokhua, aka Retired Engineer, chronicling NVIDIA's move to contract TSMC for 7 nm and 5 nm EUV nodes for GPU manufacturing, made a startling revelation about NVIDIA's recent foundry diversification moves. Back in July 2019, a leading Korean publication confirmed NVIDIA's decision to contract Samsung for its next-generation GPU manufacturing. This was a week before AMD announced its first new-generation 7 nm products built for the TSMC N7 node, "Navi" and "Zen 2." The DigiTimes report reveals that NVIDIA underestimated the efficiency gains AMD would yield from TSMC N7.

With NVIDIA's bonhomie with Samsung underway, and Apple transitioning to TSMC N5, AMD moved in to quickly grab 7 nm-class foundry allocation and gained prominence with the Taiwanese foundry. The report also calls out a possible strategic error on NVIDIA's part. Upon realizing the efficiency gains AMD managed, NVIDIA decided to bet on TSMC again (apparently without withdrawing from its partnership with Samsung), only to find that AMD had secured a big chunk of its nodal allocation needed to support its growth in the x86 processor and discrete GPU markets. NVIDIA has hence decided to leapfrog AMD by adapting its next-generation graphics architectures to TSMC's EUV nodes, namely the N7+ and N5. The report also speaks of NVIDIA using its Samsung foundry allocation as a bargaining chip in price negotiations with TSMC, but with limited success as TSMC established its 7 nm-class industry leadership. As it stands now, NVIDIA may manufacture its 7 nm-class and 5 nm-class GPUs on both TSMC and Samsung.

TSMC Secures Orders from NVIDIA for 7nm and 5nm Chips

TSMC has reportedly secured orders from NVIDIA for chips based on its 7 nm and 5 nm silicon fabrication nodes, sources tell DigiTimes. If true, it could confirm rumors of NVIDIA splitting its next-generation GPU manufacturing between TSMC and Samsung. The Korean semiconductor giant is commencing 5 nm EUV mass production within Q2-2020, and NVIDIA is expected to be one of its customers. NVIDIA is expected to shed light on its next-gen graphics architecture at the GTC 2020 online event held later this month. With its "Turing" architecture approaching six quarters of market presence, it's likely that the decks are being cleared for a new architecture not just in HPC/AI compute product segment, but also GeForce and Quadro consumer graphics cards. Splitting manufacturing between TSMC and Samsung would help NVIDIA disperse any yield issue arriving from either foundry's EUV node, and give it greater bargaining power with both.

Tachyum Prodigy is a Small 128-core Processor with Crazy I/O Options, 64-core Sibling Enroute Production

Silicon Valley startup Tachyum, founded in 2016, is ready with its crowning product, the Tachyum Prodigy. The startup recently received an investment from the Slovak government in hopes of job-creation in the country. The Prodigy is what its makers call "a universal processor," which "outperforms the fastest Xeon at 10X lower power." The company won't mention what machine architecture it uses (whether it's Arm or MIPS, or its own architecture). Its data-sheet is otherwise full of specs that scream at you.

To begin with, its top trim, the Prodigy T16128, packs 128 cores on a single package, complete with 64-bit address space, 512-bit vector extensions, matrix multiplication fixed-function hardware that accelerate AI/ML, and 4 IPC at up to 4.00 GHz core clock. Tachyum began the processor's software-side support, with an FPGA emulator in December 2019 (so you can emulate the processor on an FPGA and begin developing for it), C/C++ and Fortran compilers; debuggers and profilers, tensorflow compilers, and a Linux distribution that's optimized it. The I/O capabilities of this chip are something else.

DigiTimes: TSMC Kicking Off Development of 2nm Process Node

A report via DigiTimes places TSMC as having announced to its investors that exploratory studies and R&D for the development of the 2 nm process node have commenced. As today's leading semiconductor fabrication company, TSMC doesn't seem to be one resting on its laurels. Their 7 nm process and derivatives have already achieved a 30% weight on the company's semiconductor orders, and their 5 nm node (which will include EUV litography) is set to hit HVM (High Volume Manufacturing) in Q2 of this year. Apart from that, not much more is known on 2 nm.

After 5 nm, which is expected to boats of an 84-87% transistor density gain over the current 7nm node, the plans are to go 3nm, with TSMC expecting that node to hit mass production come 2022. Interestingly, TSMC is planning to still use FinFET technology for its 3 nm manufacturing node, though in a new GAAFET (gate-all-around field-effect transistor) technology. TSMC's plans to deploy FinFET in under 5nm manufacturing is something that many industry analysts and specialist thought extremely difficult to achieve, with expectations for these sub-5nm nodes to require more exotic materials and transistor designs than TSMC's apparent plans

NVIDIA is Secretly Working on a 5 nm Chip

According to the report of DigiTimes, which talked about TSMC's 5 nm silicon manufacturing node, they have reported that NVIDIA is also going to be a customer for it and they could use it in the near future. And that is very interesting information, knowing that these chips will not go in the next generation of GPUs. Why is that? Because we know that NVIDIA will utilize both TSMC and Samsung for their 7 nm manufacturing nodes for its next-generation Ampere GPUs that will end up in designs like GeForce RTX 3070 and RTX 3080 graphics cards. These designs are not what NVIDIA needs 5 nm for.

Being that NVIDIA already has a product in its pipeline that will satisfy the demand for the high-performance graphics market, maybe they are planning something that will end up being a surprise to everyone. No one knows what it is, however, the speculation (which you should take with a huge grain of salt) would be that NVIDIA is updating its Tegra SoC with the latest node. That Tegra SoC could be used in a range of mobile devices, like the Nintendo Switch, so could NVIDIA be preparing a new chip for Nintendo Switch 2?
NVIDIA Xavier SoC

Apple Rumored to Launch New Mac in 2021 with 5 nm A14 SoC, x86 no More

In a recent report by Bloomberg it was revealed that Apple is planning to start selling Mac computers featuring their upcoming in-house A14 ARM chip which will power the next generation iPhone & iPad in 2021. According to sources familiar with the matter Apple is developing three new processors based on the A14 to power some 2021 Mac products, these chips will be manufactured on TSMCs 5 nm process. One of these new processors is expected to be more powerful then the iPhone version.

This marks a significant move for Apple as they shift from x86 to in-house ARM designs across their entire product lineup, we have an editorial on the rise of ARM here. This development is part of Apple's plan to increase control over their products in an attempt to fully unify the Apple ecosystem and reduce reliance on Intel who has struggled to offer significant performance increases in recent years, this will come as a major blow to Intel who benefited greatly from Apple's demand. Apple will need to adapt MacOS for an ARM based design and ensure their is compatibility for third party x86 applications. The first processor is expected to feature 8 "Firestorm" cores and at least four energy-efficient "Icestorm" cores, Apple is also exploring options for up to 12 core processors based on the same design for use in future Macs.

TSMC 3nm Process Packs 250 Million Transistors Per Square Millimeter

Imagine being able to shrink a Pentium 4 processor die to the size of a pin-head (if you can figure out how to place 478 bumps on it). TSMC revealed that its future 3 nanometer silicon fabrication node has a development target of 250 million transistors per mm². Called N3, the next-generation silicon fabrication node succeeds TSMC's N5 family of 5 nm-class nodes (that's N5 and any possible refinements).

TSMC CEO CC Wei confirmed that development of the 3 nm node is on-track, with risk production scheduled for 2021 and volume production commencing in the second half of 2022. Perhaps the most startling revelation is that TSMC has decided to stick with FinFETs for N3 owing to the maturity of the technology. Experts are of the opinion that sub-5 nm nodes will require major innovations with materials and structures. TSMC claims that N3 will provide a 10-15% speed improvement at iso-power or 25-30% power reduction at iso-speed, compared to N5.

TSMC Reports Q1-2020 Financial Results with $4.51NTD EPS

TSMC (TWSE: 2330, NYSE: TSM) today announced consolidated revenue of NT$310.60 billion, net income of NT$116.99 billion, and diluted earnings per share of NT$4.51 (US$0.75 per ADR unit) for the first quarter ended March 31, 2020. Year-over-year, first quarter revenue increased 42.0% while net income and diluted EPS both increased 90.6%. Compared to fourth quarter 2019, first quarter results represented a 2.1% decrease in revenue and a 0.8% increase in net income. All figures were prepared in accordance with TIFRS on a consolidated basis.

In US dollars, first quarter revenue was $10.31 billion, which increased 45.2% year-over-year and decreased 0.8% from the previous quarter. Gross margin for the quarter was 51.8%, operating margin was 41.4%, and net profit margin was 37.7%. In the first quarter, shipments of 7-nanometer accounted for 35% of total wafer revenue and 10-nanometer process technology contributed 0.5% while 16-nanometer accounted for 19%. Advanced technologies, defined as 16-nanometer and more advanced technologies, accounted for 55% of total wafer revenue.

Huawei's Loss AMD's Gain, TSMC Develops Special 5nm Node

With Mainland Chinese tech giant Huawei being effectively cut off from contracting Taiwanese TSMC to manufacture its next-generation HiSilicon 5G mobile SoCs, and NVIDIA switching to Samsung for its next-generation GPUs, TSMC is looking to hold on to large high-volume customers besides Apple and Qualcomm, so as to not let them dictate pricing. AMD is at the receiving end of the newfound affection, with the semiconductor firm reportedly developing a new refinement of its 5 nm node specially for AMD, possibly to make Sunnyvale lock in on TSMC for its future chip architectures. A ChainNews report decoded by @chiakokhua sheds light on this development.

AMD is developing its "Zen 4" CPU microarchitecture for a 5 nm-class silicon fabrication node, although the company doesn't appear to have zeroed in on a node for its RDNA3 graphics architecture and CDNA2 scalar compute architecture. In its recent public reveal of the two, AMD chose not to specify the foundry node for the two, which come out roughly around the same time as "Zen 4." It wouldn't be far fetched to predict that AMD and TSMC were waiting on certainty for the new 5 nm-class node's development. There are no technical details of this new node. AMD's demand for TSMC is expected to be at least 20,000 12-inch wafers per month.

Apple's A12Z SoC Features the Same A12X Silicon

With an introduction of new iPad Pro tablets, Apple has brought another new silicon to its offerings in the form of A12Z SoC. Following the previous king in tablet space, the A12X SoC, Apple has decided to update its silicon and now there is another, more advanced stepping in form of an A12Z SoC. Thanks to the report from TechInsights, their analysis has shown that the new SoC used in Apple's devices is pretty much the same compared to the A12X SoC of last year, except the GPU used. Namely, the configuration of A12X is translated into the A12Z - there are four Apple Vortex and four Apple Tempest cores for the CPU. There is a 128-bit memory bus designed for LPDDR4X memory, the same as the A12X.

What is different, however, is the GPU cluster configuration. In A12X there was a cluster filled with 7 working and one disabled A12-gen GPU core. In A12Z SoC all of the 8 GPUs present are enabled and working, and they are also of the same A12 generation. The new SoC is even built using the same N7 7 nm manufacturing process from TSMC. While we don't know the silicon stepping revision of the A12Z, there aren't any new features besides the additional GPU core.
Apple A12Z Bionic

Huawei Moves 14 nm Silicon Orders from TSMC to SMIC

Huawei's subsidiary, HiSilicon, which designs the processors used in Huawei's smartphones and telecommunications equipment, has reportedly moved its silicon orders from Taiwan Semiconductor Manufacturing Company (TSMC) to Semiconductor Manufacturing International Corporation (SMIC), according to DigiTimes. Why Huawei decided to do is move all of the 14 nm orders from Taiwanese foundry to China's largest silicon manufacturing fab, is to give itself peace of mind if the plan of the US Government goes through to stop TSMC from supplying Huawei. At least for the mid-tier chips built using 14 nm node, Huawei would gain some peace as a Chinese fab is a safer choice given the current political situation.

When it comes to the high-end SoCs built on 7 nm, and 5 nm in the future, it is is still uncertain how will Huawei behave in this situation, meaning that if US cuts off TSMC's supply to Huawei, they will be forced to use SMIC's 7 nm-class N+1 node instead of anything from TSMC. Another option would be Samsung, but it is a question will Huawei put itself in risk to be dependant on another foreign company. The lack of 14 nm orders from Huawei will not be reflecting much on TSMC, because whenever someone decides to cut orders, another company takes up the manufacturing capactiy. For example, when Huawei cut its 5 nm orders, Apple absorbed by ordering more capacity. When Huawei also cut 7 nm orders, AMD and other big customers decided to order more, making the situation feel like there is a real fight for TSMC's capacity.
Silicon Wafer

TSMC Sees Higher Demand for CoWoS Packaging

TSMC, Taiwan's flagship manufacturer of silicon, has seen a substantial increase in demand for Chip-on-Wafer-on-Substrate (CoWoS) packaging technology, according to the report from DigiTimes. CoWoS is a multi-chip packaging technology that gives an option to build silicon like LEGO, allowing for dies to be placed side by side on interposer that is providing high interconnect density and performance. You can see more about CoWoS in detail here. Some of the examples of CoWoS are NVIDIA's P100 and V100 dies that integrate logic (computing elements), and memory (in the form of HBM) on a single die.

Recently, TSMC updated its CoWoS technology, where this new second-generation parts could scale far larger than the first-generation implementation - up to 1700 squared millimeters of die space, allowing for some very creative solutions to be implemented. This may be the reason that the demand in Q2 has risen so substantially and that TSMC's production lines are now running at full capacity, trying to meet the demand for this packaging technology.
TSMC CoWoS NVIDIA V100

AMD 4th Gen Ryzen Desktop Processors to Launch Around September 2020

AMD's 4th generation Ryzen desktop processors are expected to launch around September 2020, sources in the motherboard industry tell DigiTimes. Codenamed "Vermeer," successor to "Matisse," these processors will be socket AM4 multi-chip modules of up to two CPU complex dies based on the "Zen 3" microarchitecture, combined with an I/O controller die. The "Zen 3" chiplets are expected to be fabricated on a newer 7 nm-class process by TSMC, either N7P or N7+. The biggest design change with "Zen 3" is the doing away of CCX arrangement of CPU cores, with each chiplet holding a common block of cores sharing a last-level cache. This, along with clock speed headroom gains from the new node are expected to yield generational price-performance increases.

The "Zen 2" based 8-core "Renoir" die is also expected to make its socket AM4 debut within 2020, succeeding the "Picasso" based quad-core Ryzen 3000-series APUs. This is a particularly important product for AMD, as it is expected to compete with Intel's 10th generation Core i5 6-core/12-thread processors in terms of pricing, while offering more cores (8-core/16-thread) and a faster iGPU. The 4th gen Ryzen socket AM4 processor lineup will launch alongside AMD's 600-series motherboard chipset, with forwards- and backwards-compatibility (i.e., "Vermeer" and "Renoir" working with older chipsets, and older AM4 processors working on 600-series chipset motherboards). AMD was originally expected to unveil these processors at the 2020 Computex trade-show in June, but Computex itself is rescheduled to late-September.

SMIC 7nm-class N+1 Foundry Node Going Live by Q4-2020

China's state-backed SMIC (Semiconductor Manufacturing International Corporation) has set an ambitious target of Q4-2020 for its 7 nanometer-class N+1 foundry node to go live, achieving "small scale production," according to a cnTechPost report. The company has a lot of weight on its shoulders as geopolitical hostility between the U.S. and China threatens to derail the country's plans to dominate 5G technology markets around the world. The SMIC N+1 node is designed to improve performance by 20%, reduce chip power consumption by 57%, reduce logic area by 63%, and reduce SoC area by 55%, in comparison to the SMIC's 14 nm FinFET node, Chinese press reports citing a statement from SMIC's co-CEO Dr. Liang Mengsong.

Dr. Liang confirmed that the N+1 7 nm node and its immediate successor will not use EUV lithography. N+1 will receive a refinement in the form of N+2, with modest chip power consumption improvement goals compared to N+1. This is similar to SMIC's 12 nm FinFET node being a refinement of its 14 nm FinFET node. Later down its lifecycle, once the company has got a handle of its EUV lithography equipment, N+2 could receive various photomasks, including a switch to EUV at scale.

U.S. Government Tightens Screws on Huawei's Global Chip Supply from TSMC

The U.S. government announced advanced measures that make it harder for foreign companies, such as Taiwan's TSMC, to supply chips to Chinese telecom hardware giant Huawei. Foreign companies that use American chipmaking equipment, are required to obtain a license from the U.S. before supplying certain chips to Huawei. Sources comment that the new rule was tailor-made to curb TSMC fabricating smartphone SoCs for Huawei's HiSilicon subsidiary.

Mainland Chinese semiconductor companies are still behind Samsung and TSMC in 7 nm-class fab technologies, forcing HiSilicon to source from the latter. 7 nm fabrication is a key requirement for SoCs and modem chips capable of 5G. The high data transceiving rates of 5G requires a certain amount of compute power that can fit into smartphone-level power-envelopes only with the help of 7 nm, at least for premium smartphone form-factors. Same applies to 5G infrastructure equipment. This is hence perceived as a means for the U.S. to clamp brakes on Huawei's plans of playing a big role in 5G tech rollouts around the world, buying western 5G tech suppliers such as Nokia time to catch up. Huawei has been a flashpoint for a bitter political spat between the U.S. and China, with the Chinese press even threatening that the matter could hamper medical supplies to the U.S. to fight the COVID-19 pandemic.
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