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AMD Radeon RX 5700 XT Confirmed to Feature 64 ROPs: Architecture Brief

AMD "Navi 10" is a very different GPU from the "Vega 10," or indeed the "Polaris 10." The GPU sees the introduction of the new RDNA graphics architecture, which is the first big graphics architecture change on an AMD GPU in nearly a decade. AMD had in 2011 released its Graphics CoreNext (GCN) architecture, and successive generations of GPUs since then, brought generational improvements to GCN, all the way up to "Vega." At the heart of RDNA is its brand new Compute Unit (CU), which AMD redesigned to increase IPC, or single-thread performance.

Before diving deeper, it's important to confirm two key specifications of the "Navi 10" GPU. The ROP count of the silicon is 64, double that of the "Polaris 10" silicon, and same as "Vega 10." The silicon has sixteen render-backends (RBs), these are quad-pumped, which work out to an ROP count of 64. AMD also confirmed that the chip has 160 TMUs. These TMUs are redesigned to feature 64-bit bi-linear filtering. The Radeon RX 5700 XT maxes out the silicon, while the RX 5700 disables four RDNA CUs, working out to 144 TMUs. The ROP count on the RX 5700 is unchanged at 64.

MSI CEO: AMD Plans to Stop Being the Value Alternative, X570 Motherboards to be Expensive

MSI's CEO Charles Chiang, quoted by Tom's Hardware at COMPUTEX 2019, laid out what we were already seeing with motherboard designs from all vendors of AMD's X570-based motherboards: pricing is likely increasing across the board, and AMD's market positioning won't be of the alternative, lower-value brand.

As quoted, Chiang said that ""Lots of people ask me, what do you think about today's AMD? I say today's AMD is completely different company compared to two, three, five years ago. They have nice technology and they are there to put the higher spec with the reasonable pricing. But right now they say, "Hey Charles, let's push to marketing to the higher [end]. So let's sell higher-pricing motherboards, higher-spec motherboards, and let's see what will happen in the market. So I don't think that AMD is the company that wants to sell low cost here, low cost there." Which does make sense: AMD isn't in the position of the underdog anymore -at least technology and product-portfolio wise when it comes to consumer CPUs. With better products, comes a desire for higher margins, and a change in direction for a company that was basically forced to almost cut itself out of the market in terms of profits with its previous, non-competitive CPU designs.

The EPI Announces Successful First Steps Towards a Made-in-Europe High-performance Microprocessor

The European Processor Initiative(EPI), crucial element of the European exascale strategy, delivers its first architectural design to the European Commission and welcomes new partners Almost six months in, the project that kicked off last December has already delivered its first architectural designs to the European Commission, thus marking initial milestones successfully executed. The project that will be the cornerstone of the EU's strategic plans in HPC initially brought together 23 partners from 10 European countries, but has now welcomed three more strong additions to its EPI family. EPI consortium aims to bring a low-power microprocessor to the market and ensure that the key competences for high-end chip design remain in Europe. The European Union's Horizon 2020 program funds this project with a special Framework Partnership Agreement. The initial stage is a three-year Specific Grant Agreement, which lasts until November 2021.

AMD Halts Further x86 Technology Licensing to China

AMD Lisa Su at Computex 2019 confirmed to Tom's hardware that the company wasn't licensing anymore of its x86 IP portfolio to China-based companies. AMD entered a technology license agreement with China's Tianjin Haiguang Advanced Technology Investment Co. Ltd. (THATIC) in 2016. As part of the agreement to license its x86 and SoC IP for chip development, AMD received a cash infusion worth $293 million (plus royalties).

As a result, Chinese chipmaker Hygon started delivering their "Dhyana" CPUs, which looked like copies of AMD's Zen-based Epyc chips with added, Chinese-government approved cryptographic capabilities. AMD had to go through some hoops to get this deal done, but it did. However, now the technology refinement pipe is draining for the Chinese companies, as AMD won't be delivering its post-Zen updates to the core design. It remains to be seen if AMD's intellectual property was enough for Chinese companies to ignite their own in-country CPU development, or if the ongoing US-China trade war will keep on draining the company of CPU independence.

AMD and Samsung Announce Strategic Partnership in Ultra Low Power, High Performance Graphics Technologies with RDNA

AMD and Samsung today announced a key strategic partnership in high performance graphics technologies for the mobile space. The agreement means that Samsung will license AMD's Radeon graphics IP in its latest RDNA iteration, no less, for integration on smartphone graphics processing. Let me stress how impressive this can be: that AMD developed a graphics architecture that can scale from a high-performance GPU down to a nimble, fast, power-sipping module for mobile graphics processing.

This is a huge strategic win for AMD, in that more and more products will be infused with their technology. As Lisa Su puts it, the Radeon user base and development ecosystem will be greatly increased with this Samsung integration - as will AMD's revenue, for sure. Perhaps we'll see a "Powered by AMD Radeon" sticker or engraving in our future Samsung smartphones, as we do with Leica partnerships, for example.)

Rumor: AMD Navi a Stopgap, Hybrid Design of RDNA and GraphicsCoreNext

The Wheel of Rumors turns, and assumptions come and pass, sometimes leaving unfulfilled hopes and dreams. In this case, the rumor mill, in what seems like a push from sweclockers, places Navi not as a "built from the ground-up" architecture, but rather as a highly customized iteration of GCN - iterated in the parts that it actually implements AMD's RDNA architecture, to be exact. And this makes sense from a number of reasons - it's certainly not anything to cry wolf about.

For one, AMD's GCN has been a mainstay in the graphics computing world since it was first introduced back in 2012, succeeding the company's TeraScale architecture. Game engines and assorted software have been well optimized already to take advantage of AMD's design - even with its two ISAs and assorted improvements over the years. One of the most important arguments is derived from this optimization effort: AMD's custom designs for the console market employ architectures that are GCN-based, and thus, any new architecture that would be used by both Microsoft and Sony for their next-generation consoles would have to be strictly backwards compatible.

ARM Revokes Huawei's Chip IP Licence

As the trade war between the US and China continues to unfold, we are seeing major US companies ban or stop providing service to China's technology giant Huawei. Now, it looks like the trade war has crossed the ocean and reached the UK. This time, UK based ARM Holdings, the provider of mobile chip IP for nearly all smartphones and tablets, has revoked the license it has given Huawei.

According to the BBC, ARM Holdings employees were instructed to suspend all interactions with Huawei, and to send a note informing Huawei that "due to an unfortunate situation, they were not allowed to provide support, deliver technology (whether software, code, or other updates), engage in technical discussions, or otherwise discuss technical matters with Huawei, HiSilicon or any of the other named entities." The news came from an internal ARM document the BBC has obtained.

Intel Switches Gears to 7nm Post 10nm, First Node Live in 2021

Intel's semiconductor manufacturing business has had a terrible past 5 years as it struggled to execute its 10 nanometer roadmap forcing the company's processor designers to re-hash the "Skylake" microarchitecture for 5 generations of Core processors, including the upcoming "Comet Lake." Its truly next-generation microarchitecture, codenamed "Ice Lake," which features a new CPU core design called "Sunny Cove," comes out toward the end of 2019, with desktop rollouts expected 2020. It turns out that the 10 nm process it's designed for, will have a rather short reign at Intel's fabs. Speaking at an investor's summit on Wednesday, Intel put out its silicon fabrication roadmap that sees an accelerated roll-out of Intel's own 7 nm process.

When it goes live and fit for mass production some time in 2021, Intel's 7 nm process will be a staggering 3 years behind TSMC, which fired up its 7 nm node in 2018. AMD is already mass-producing CPUs and GPUs on this node. Unlike TSMC, Intel will implement EUV (extreme ultraviolet) lithography straightaway. TSMC began 7 nm with DUV (deep ultraviolet) in 2018, and its EUV node went live in March. Samsung's 7 nm EUV node went up last October. Intel's roadmap doesn't show a leap from its current 10 nm node to 7 nm EUV, though. Intel will refine the 10 nm node to squeeze out energy-efficiency, with a refreshed 10 nm+ node that goes live some time in 2020.

Intel Xe GPUs to Support Raytracing Hardware Acceleration

Intel's upcoming Xe discrete GPUs will feature hardware-acceleration for real-time raytracing, similar to NVIDIA's "Turing" RTX chips, according to a company blog detailing how the company's Rendering Framework will work with the upcoming Xe architecture. The blog only mentions that the company's data-center GPUs support the feature, and not whether its client-segment ones do. The data-center Xe GPUs are targeted at cloud-based gaming service and cloud-computing providers, as well as those building large rendering farms.

"I'm pleased to share today that the Intel Xe architecture roadmap for data center optimized rendering includes ray tracing hardware acceleration support for the Intel Rendering Framework family of API's and libraries," said Jim Jeffers, Sr. Principal Engineer and Sr. Director of Intel's Advanced Rendering and Visualization team. Intel did not go into technical details of the hardware itself. NVIDIA demonstrated that you need two major components on a modern GPU to achieve real-time raytracing: 1. a fixed-function hardware that computes intersection of rays with triangles or surfaces (which in NVIDIA's case are the RT cores), and 2. an "inexpensive" de-noiser. NVIDIA took the AI route to achieve the latter, by deploying tensor cores (matrix-multiplication units), which accelerate AI DNN building and training. Both these tasks are achievable without fixed-function hardware, using programmable unified shaders, but at great performance cost. Intel developed a CPU-based de-noiser that can leverage AVX-512.

Several Gen11 GPU Variants Referenced in Latest Intel Drivers

The latest version of Intel Graphics drivers which introduce the company's latest UWP-based Graphics Command Center app, hide another secret in their INF. The file has pointers to dozens of variants and implementations of the company's next-generation Gen11 integrated graphics architecture, which we detailed in a recent article. Intel will implement Gen11 on two key processor microarchitectures, "Ice Lake" and "Lakefield," although later down the line, the graphics technology could trickle down to low-power Pentium Silver and Celeron SoC lines, too, with chips based on the "Elkhart Lake" silicon.

There are 13 variants of Gen11 on "Ice Lake," carved using execution unit (EU) count, and LP (low-power) aggressive power management. The mainstream desktop processors based on "Ice Lake," which are least restrained in power-management, get the most powerful variants of Gen11 under the Iris Plus brand. Iris Plus Graphics 950 is the most powerful implementation, with all 64 EUs enabled, and the highest GPU clock speeds. This variant could feature on Core i7 and Core i9 brands derived from "Ice Lake." Next up, is the Iris Plus Graphics 940, with the same EU count, but likely lower clock speeds, which could feature across the vast lineup of Core i5 SKUs. The Iris Plus 930 comes in two trims based on EU count, of 64 and 48, and could likely be spread across the Core i3 lineup. Lastly, there's the Iris Plus 920 with 32 EUs, which could be found in Pentium Gold SKUs. There are various SKUs branded "UHD Graphics Gen11 LP," with EU counts ranging from 32 to 64.

AMD CPUs Immune to SPOILER Vulnerability: Company Statement

SPOILER, short for Speculative Load Hazards Boost Rowhammer and Cache Attacks (not sure how that abbreviates), is the latest in the long line of security vulnerabilities preying on imperfections in speculative-execution capabilities of modern processors, which surfaced early March, and affects all Intel processors. The vulnerability exploits the speculative nature of loading data from main memory to a CPU register. Intel has yet to assign a CVE to SPOILER, and hasn't yet released its own documentation on possible mitigation.

Meanwhile, rival AMD put out a statement that its processors are inherently immune to SPOILER due to a fundamentally different memory management design. "We are aware of the report of a new security exploit called SPOILER which can gain access to partial address information during load operations. We believe that our products are not susceptible to this issue because of our unique processor architecture. The SPOILER exploit can gain access to partial address information above address bit 11 during load operations. We believe that our products are not susceptible to this issue because AMD processors do not use partial address matches above address bit 11 when resolving load conflicts," the company writes in its statement.

AMD May Offer Some Insights on Upcoming Ryzen 3000 Series at GDC 2019

AMD's Ryzen 3000 series is one of the most hotly anticipated hardware launches in recent times. I'd say that the hype surrounding AMD's processor launches, unlike Intel's, has become vested with an actual enthusiasm that is likely in our nature - to see the underdog come out with innovative products that reverse market expectations. AMD's processor launches have seen hype levels rivaling - and even surpassing, all of this anecdotally, of course - some GPU launches. It makes sense for AMD to embrace every opportunity it gets to build hype around its products - and it seems the company will be doing just so at GDC 2019, which will run from March 18th through March 22nd.

AMD will be hosting a time slot at GDC 2019 in San Francisco. Hosted by Ken Mitchell, the presentation that has been slotted in to GDC's panels is titled ""AMD Ryzen Processor Software Optimization (Presented by AMD)". As the announcement reads, this presentation is meant to "Learn about the Ryzen line up of processors, profiling tools and techniques to understand optimization opportunities, and get a glimpse of the next generation of "Zen 2" x86 core architecture. Gain insight into code optimization opportunities and lessons learned with examples including C/C++, assembly, and hardware performance-monitoring counters." So no, there won't be any architecture deep dives. But there will be some new information - and we all know that speculating and running through the breadcrumb trail is a huge part of the fun.
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