Sapphire Radeon RX 590 Nitro+ Special Edition 8 GB Review 67

Sapphire Radeon RX 590 Nitro+ Special Edition 8 GB Review

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Architecture


At the heart of the Radeon RX 590 is the new "Polaris 30" silicon, which, as we mentioned earlier, is essentially the same chip that powers the RX 580 and RX 570, but is fabricated on the 12 nm FinFET process. The shrink to 12 nm improves power and thermal characteristics of the chip, allowing its designers to increase clock speeds. AMD missed the opportunity to make small but meaningful hardware changes, such as updating the display controllers with support for technologies such as VirtualLink, or at least updating the multimedia engine with hardware acceleration of newer video formats. The die size of the GPU is unchanged, which suggests that only a smaller transistor design is used, without any changes to the rest of the circuitry.


The architecture block diagram for the "Polaris 30" is hence identical to "Polaris 10" from 2016. A command processor distributes workloads between four Shader Engines, which distributes a geometry processor, rasterizer, and 8 ROPs among 9 compute-units, each. The compute-unit (CU) is the indivisible sub unit of the "Polaris" architecture and performs the bulk of the number crunching on the GPU. Each CU packs 64 stream processors, sharing them with tiny data caches, a scheduler, a scalar unit, and four TMUs.


The "Polaris 30" GPU has 36 compute units, and a total of 2,304 stream processors, 144 TMUs, and 32 ROPs, all of which are numbers that are unchanged from the RX 580 and RX 480. The L2 cache is town-square for the GPU, which is addressed by not just the front-end, but also the four Shader Engines, 256-bit wide GDDR5 memory interface, PCI-Express 3.0 x16 host interface, multimedia engine, and display controllers. One area where AMD's architecture excels NVIDIA's is with asynchronous compute, in which the GPU can divide graphics and compute workloads more granularly between its compute units. The "Polaris 30" silicon features two hardware schedulers dedicated to asynchronous compute.
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