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Pichau Aldrin Pro 2 TB

2 TB
Capacity
IG5236
Controller
TLC
Flash
PCIe 4.0 x4
Interface
M.2 2280
Form Factor
PCB Front
Gabriel Ferraz (YT)
PCB Front
PCB Back
Gabriel Ferraz (YT)
PCB Back
DRAM
Gabriel Ferraz (YT)
DRAM
Flash
Gabriel Ferraz (YT)
Flash
SSD Controller
Controller
NAND Die
NAND Die
The Pichau Aldrin Pro is a solid-state drive in the M.2 2280 form factor, launched in 2023. It is available in capacities ranging from 512 GB to 2 TB. This page reports specifications for the 2 TB variant. With the rest of the system, the Pichau Aldrin Pro interfaces using a PCI-Express 4.0 x4 connection. The SSD controller is the IG5236 (Rainier) from InnoGrit, a DRAM cache chip is available. Pichau has installed 128-layer TLC NAND flash on the Aldrin Pro, the flash chips are made by YMTC. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are absorbed more quickly. The cache is sized at 691 GB, once it is full, writes complete at 2159 MB/s. Copying data out of the SLC cache (folding) completes at 863 MB/s. Thanks to support for the fast PCI-Express 4.0 interface, performance is excellent. The Aldrin Pro is rated for sequential read speeds of up to 7,400 MB/s and 6,600 MB/s write; random IO reaches 1000K IOPS for read and 1000K for writes.
At its launch, the SSD was priced at 159 USD. The warranty length is set to one year, which is quite short for the SSD industry. Pichau guarantees an endurance rating of 1000 TBW, a high value.

Solid-State-Drive

Capacity: 2 TB (2048 GB)
Variants: 512 GB 1 TB 2 TB
Overprovisioning: 140.7 GB / 7.4 %
Production: Active
Released: 2023
Price at Launch: 159 USD
Part Number: PCH-ALDPRO-2TB
Market: Consumer

Physical

Form Factor: M.2 2280 (Double-Sided)
Interface: PCIe 4.0 x4
Protocol: NVMe 1.4
Power Draw: 1.8 W (Idle)
4.7 W (Avg)
7.4 W (Max)

Controller

Manufacturer: InnoGrit
Name: IG5236 (Rainier)
Architecture: ARM 32-bit Cortex-R5
Core Count: Quad-Core
Frequency: 667 MHz
Foundry: TSMC FinFET
Process: 12 nm
Flash Channels: 8 @ 1,200 MT/s
Chip Enables: 4
Controller Features: DRAM (enabled)

NAND Flash

Manufacturer: YMTC
Name: Xtacking 2.0 (CDT1B)
Part Number: SYMN09TC1B1RC6C
Type: TLC
Technology: 128-layer
Speed: 1600 MT/s
Capacity: 4 chips @ 4 Tbit
ONFI: 4.1
Topology: Charge Trap
Die Size: 60 mm²
(8.5 Gbit/mm²)
Dies per Chip: 8 dies @ 512 Gbit
Planes per Die: 4
Decks per Die: 2
Word Lines: 141 per NAND String
90.8% Vertical Efficiency
Read Time (tR): 50 µs
Program Time (tProg): 620 µs
Block Erase Time (tBERS): 20 ms
Die Read Speed: 1280 MB/s
Die Write Speed: 70 MB/s
Endurance:
(up to)
3000 P/E Cycles
Page Size: 16 KB
Block Size: 2304 Pages
Plane Size: 1980 Blocks

DRAM Cache

Type: DDR4-3200 CL22
Name: Micron MT40A512M16TB-062E:R (D8BPK)
Capacity: 2048 MB
(2x 1024 MB)
Organization: 8Gx16

Performance

Sequential Read: 7,400 MB/s
Sequential Write: 6,600 MB/s
Random Read: 1,000,000 IOPS
Random Write: 1,000,000 IOPS
Endurance: 1000 TBW
Warranty: 1 Year
MTBF: 1.5 Million Hours
Drive Writes Per Day (DWPD): 1.3
SLC Write Cache: approx. 691 GB
(dynamic only)
Speed when Cache Exhausted: approx. 2159 MB/s
Cache Folding Speed: 863 MB/s

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • Unknown
RGB Lighting: No
PS5 Compatible: Yes

Reviews

Same Drive

This section lists other SSDs in our database using the exact same hardware components

Notes

NAND Die:

Read Time (tR): Maximum is 50 µs, typical is lower
Typical Program Time (tPROG): 620 µs
Maximum Program Time (tPROG): Maximum is 910 µs
Block Erase Time (tBERS): Maximum is 20 ms, typical is lower
Array Eficiency of over 92%
YMTC 128L Xtacking 2.0 cell architecture consists of two decks connected through deck-interface buffer layer which is the same process with KIOXIA 112L BiCS 3D NAND structure. Cell size, CSL pitch, and 9-hole VC layouts keep the same design and dimension (horizontal/vertical WL and BL pitches) with previous 64L Xtacking 1.0 cell. Total number of gates is 141 (141T) including selectors and dummy WLs for the TLC operation.
This layout has a 1x 4 Plane layout, each one lineup side by side

Jun 2nd, 2024 16:23 EDT change timezone

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