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Digifast Ace 512 GB

512 GB
Capacity
Phison E12S
Controller
TLC
Flash
PCIe 3.0 x4
Interface
M.2 2280
Form Factor
Front
Package
Package
SSD Controller
Controller
NAND Die
NAND Die
The Digifast Ace is a solid-state drive in the M.2 2280 form factor, launched in 2019. It is available in capacities ranging from 256 GB to 2 TB. This page reports specifications for the 512 GB variant. With the rest of the system, the Digifast Ace interfaces using a PCI-Express 3.0 x4 connection. The SSD controller is the PS5012-E12S-32 from Phison. Digifast has installed 64-layer TLC NAND flash on the Ace, the flash chips are made by Toshiba. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are absorbed more quickly. The cache is sized at 24 GB. The Ace is rated for sequential read speeds of up to 3,400 MB/s and 2,100 MB/s write; random IO reaches 357K IOPS for read and 445K for writes.
At its launch, the SSD was priced at 70 USD. The warranty length is set to five years, which is an excellent warranty period. Digifast guarantees an endurance rating of 300 TBW, a typical value for consumer SSDs.

Solid-State-Drive

Capacity: 512 GB
Variants: 256 GB 512 GB 1 TB 2 TB
Overprovisioning: 35.2 GB / 7.4 %
Production: Active
Released: 2019
Price at Launch: 70 USD
Part Number: DGFA512M2L02
Market: Consumer

Physical

Form Factor: M.2 2280 (Double-Sided)
Interface: PCIe 3.0 x4
Protocol: NVMe 1.3
Power Draw: 0.91 W (Idle)
Unknown (Avg)
Unknown (Max)

Controller

Manufacturer: Phison
Name: PS5012-E12S-32
Architecture: ARM 32-bit Cortex-R5
Core Count: Quad-Core
Frequency: 667 MHz
Foundry: TSMC
Process: 12 nm
Flash Channels: 8 @ 667 MT/s
Chip Enables: 4
Controller Features: DRAM

NAND Flash

Manufacturer: Toshiba
Name: BiCS3
Type: TLC
Technology: 64-layer
Speed: 533 MT/s
Capacity: Unknown
Toggle: 2.0
Topology: Charge Trap
Process: 19 nm
Die Size: 132 mm²
(3.9 Gbit/mm²)
Planes per Die: 2
Decks per Die: 2
Read Time (tR): 80 µs
Program Time (tProg): 695 µs
Die Read Speed: 400 MB/s
Die Write Speed: 46 MB/s
Endurance:
(up to)		 3000 P/E Cycles
(30000 in SLC Mode)
Page Size: 16 KB
Block Size: 768 Pages
Plane Size: 2732 Blocks

DRAM Cache

Type and Size: Unknown

Performance

Sequential Read: 3,400 MB/s
Sequential Write: 2,100 MB/s
Random Read: 357,000 IOPS
Random Write: 445,000 IOPS
Endurance: 300 TBW
Warranty: 5 Years
MTBF: 1.8 Million Hours
Drive Writes Per Day (DWPD): 0.3
SLC Write Cache: approx. 24 GB
(dynamic only)

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • No
RGB Lighting: No
PS5 Compatible: No

Notes

Controller:

2 main cores using Cortex-R5 clocked at 667 MHz with CoXProcessor technology (one additional dual-core) Cortex-R5 clocked at a lower clock for better efficience. The difference between this revision and the E12 revision is that this has a nichel IHS to improve the temperature, a smaller size, smaller node (12nm TSMC FinFET) and this works with less DRAM capacity.

NAND Die:

Read latency:
tR: 64µs (SBL)
tR: 80µs (ABL)
tPROG withoug Overhead: ~ 695µs (Avg) (~ 46 MB/s per die)
tPROG w/ ~25% Overhead: ~ 927µs (Avg) (~ 34.5 MB/s per die)
Jun 1st, 2024 10:25 EDT change timezone

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