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Silicon Power XD80 512 GB

512 GB
Capacity
Phison E12S
Controller
TLC
Flash
PCIe 3.0 x4
Interface
M.2 2280
Form Factor

Multiple hardware versions found.

Performance could vary due to unannounced flash/controller changes.

SSD Controller
Controller
NAND Die
NAND Die
The Silicon Power XD80 is a solid-state drive in the M.2 2280 form factor, launched on March 12th, 2021. It is available in capacities ranging from 256 GB to 2 TB. This page reports specifications for the 512 GB variant. With the rest of the system, the Silicon Power XD80 interfaces using a PCI-Express 3.0 x4 connection. The SSD controller is the PS5012-E12S-32 from Phison, a DRAM cache chip is available. Silicon Power has installed 96-layer TLC NAND flash on the XD80, the flash chips are made by Toshiba. Please note that this SSD is sold in multiple variants with different NAND flash or controller, which could affect performance, the "Notes" section at the end of this page has more info. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are handled more quickly. The XD80 is rated for sequential read speeds of up to 3,400 MB/s and 2,300 MB/s write; random IO reaches 290K IOPS for read and 510K for writes.
At its launch, the SSD was priced at 65 USD. The warranty length is set to five years, which is an excellent warranty period. Silicon Power guarantees an endurance rating of 400 TBW, a typical value for consumer SSDs.

Solid-State-Drive

Capacity: 512 GB
Variants: 256 GB 512 GB 1 TB 2 TB
Overprovisioning: 35.2 GB / 7.4 %
Production: Active
Released: Mar 12th, 2021
Price at Launch: 65 USD
Part Number: SP512GBP34XD8005
Market: Consumer

Physical

Form Factor: M.2 2280 (Single-Sided)
Interface: PCIe 3.0 x4
Protocol: NVMe 1.3
Power Draw: Unknown

Controller

Manufacturer: Phison
Name: PS5012-E12S-32
Architecture: ARM 32-bit Cortex-R5
Core Count: Quad-Core
Frequency: 667 MHz
Foundry: TSMC
Process: 12 nm
Flash Channels: 8 @ 667 MT/s
Chip Enables: 4
Controller Features: DRAM (enabled)

NAND Flash

Manufacturer: Toshiba
Name: BiCS4
Type: TLC
Technology: 96-layer
Speed: 800 MT/s
Capacity: Unknown
ONFI: 4.0
Toggle: 3.0
Topology: Charge Trap
Process: 19 nm
Die Size: 86 mm²
(6.0 Gbit/mm²)
Planes per Die: 2
Decks per Die: 2
Word Lines: 109 per NAND String
88.1% Vertical Efficiency
Read Time (tR): 58 µs
Program Time (tProg): 561 µs
Die Read Speed: 551 MB/s
Die Write Speed: 57 MB/s
Endurance:
(up to)
3000 P/E Cycles
(30000 in SLC Mode)
Page Size: 16 KB
Block Size: 1152 Pages
Plane Size: 1822 Blocks

DRAM Cache

Type: DDR3L
Capacity: Unknown

Performance

Sequential Read: 3,400 MB/s
Sequential Write: 2,300 MB/s
Random Read: 290,000 IOPS
Random Write: 510,000 IOPS
Endurance: 400 TBW
Warranty: 5 Years
MTBF: 2.0 Million Hours
Drive Writes Per Day (DWPD): 0.4
SLC Write Cache: Yes

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • No
RGB Lighting: No
PS5 Compatible: No

Notes

Drive:

There is a variant with YMTC's 64-Layers Dies

Controller:

2 main cores using Cortex-R5 clocked at 667 MHz with CoXProcessor technology (one additional dual-core) Cortex-R5 clocked at a lower clock for better efficience. The difference between this revision and the E12 revision is that this has a nichel IHS to improve the temperature, a smaller size, smaller node (12nm TSMC FinFET) and this works with less DRAM capacity.

NAND Die:

Read latency tR: 58 µs (ABL)
tPROG with ~ 25% Overhead: ~ 750 µs (Avg - 42.7 MB/s per each die)

Jun 3rd, 2024 04:52 EDT change timezone

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