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ONFI Announces Publication of 3.0 Standard, Pushes Data Transfer Speeds to 400 MB/sec

Discussion in 'News' started by btarunr, Mar 18, 2011.

  1. btarunr

    btarunr Editor & Senior Moderator Staff Member

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    The Open NAND Flash Interface (ONFI) Working Group, the organization dedicated to simplifying integration of NAND Flash memory into consumer electronic devices, computing platforms, and industrial systems, today published the new ONFI 3.0 standard. By using the non-volatile DDR2 (NV-DDR2) interface, the newly ratified standard reaches speeds of up to 400 megabytes (MB)/sec, doubling the current NAND interface transfer rates.

    The ONFI 3.0 standard details the interface and infrastructure that ONFI's more than 100 members can employ to develop products that deliver the industry's fastest NAND interface. Improvements in ONFI 3.0's NAND interface speeds will also enable future NAND controllers to achieve similar performance with half the number of channels, providing both a cost and space savings, which are key requirements for solid-state drive (SSD) design. The ONFI 3.0 incorporates a sophisticated die selection feature that reduces the number of chip enable (CE) pins, which in turn lowers the number of controller pins making PCB routing more efficient. Reducing the number of CE pins is especially important for SSDs, providing a significant cost reduction and allowing the extra pins to be assigned to other applications within the system.

    "The enabling of fast ONFI 3.0 NAND is something a controller company can greatly benefit from," says K.S. Pua, Chairman and CEO of Phison Electronics. "Our customers are eager to achieve higher speeds in their USB 3.0 and SATA SSD products. The adoption of ONFI 3.0 would mean keeping up with the increasing bandwidth offered by these host interfaces, bringing the overall performance of NAND applications to an outstanding level."

    Like previous ONFI standards, ONFI 3.0 is designed with simplicity in mind for NAND-based devices and is backwards compatible with previous ONFI standards. In future versions, ONFI 3.0 will also support the ECC Zero (EZ-NAND) interface, which removes burden of the host controller having to keep pace with the fast changing ECC requirements of NAND technology.

    Simplifying Adoption with Broad Ecosystem Support
    "Micron is focused on providing customers with a broad range of flash-based storage options that deliver a clear performance value-add, whether it's at the NAND component level or within our portfolio of system-level solutions," said Kevin Kilbuck, director of marketing for Micron's NAND Solutions Group. "We look forward to extending our NAND and SSD portfolio to take advantage of the fast performance improvements and CE pin reduction that ONFI 3.0 provides."

    "The new ONFI 3.0 technology supporting interface transfer rates of up to 400MB/s is a key NAND capability to support future SSD design," said Knut Grimsrud, Intel fellow and director of storage architecture. "With this interface performance scaling, ONFI NAND will play an important role in SSD compute development, especially for high-performance computing applications where speed is paramount."

    "The ONFI 3.0 specification is a further step in the definition of a long term roadmap for faster NAND Flash memory interfaces," said Roberto Colecchia, Marketing Manager at Spansion. "Spansion has contributed to the design of this specification which we believe will be able to support the growing demand for faster data transfer required by several market segments."

    "ONFI 3.0 doubles the bus speed which is critical to delivering high-performance solid state storage solutions across all compute application needs, especially for given capacity footprints as NAND die density and page sizes increase," said Steffen Hellmold, vice president of business development for SandForce. "Furthermore the innovative measures taken to reduce pin count will help drive system improvements in cost and complexity. We are proud supporters of the ONFI specification and are working on delivering an SSD processor solution fully embracing this new interface capability in 2012."

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