Tuesday, August 24th 2010
AMD's Bobcat Takes Aim at Key Consumer Low-Power Market Segments
AMD's answer to a lot of Intel's processors in the low-power category, be it the Core i3/i5 "Clarkdale", Core CULV, or even the Atom, seems to have finally taken shape with "Bobcat". This processor is a major design overhaul, as it integrates a number of key components, including a GPU. Since the GPU component is so complex and integrated with the rest of the processor at such a level, AMD decided to name the processor an "Accelerated Processing Unit" or APU. Beyond just driving video and 3D graphics, the GPU component of Bobcat is designed to lend a hand to the CPU cores whenever needed.
The GPU doubles up as a raw SIMD engine array that works with applications over OpenCL and ATI Stream technologies to step up performance. The "Bobcat" Fusion APU integrates x86 processor cores with a high-performance switch that doubles up as a memory controller, which connects to a SIMD engine, a UVD display controller, and platform interfaces that include connection to the southbridge chipset and display I/O.The x86 processor cores are redesigned to cut unnecessary fat (read: caches). It features smaller, but lower latency L1 caches (32 KB L1-I and 32 KB L1-D), advanced branch prediction, full out of the order instruction execution and load/store engines, and a high-performance FPU. The processor supports the AMD64 x86-64 ISA compliant instruction set. As far as SIMD instruction sets go, it seems to have done away with SSE4a and implemented SSSE3 (Supplementary SSE3) ISA instruction set. AMD-V is present to add virtualization support.As far as energy efficiency goes, the design allows AMD to create cores that draw less than 1W of power. The performance-watt equation is a watershed: AMD expects a chip with 90% of the performance of the current notebook CPUs to have less than half the die area, and a fraction of the power draw. The chip is designed to be deployed in a number of packages to suit various designs.
AMD is targeting the lower-mainstream and entry-level PC segments, netbooks and nettops, and cloud-computing clients with the Bobcat architecture. These chips branded under the "Fusion" brand name will be marketed in 2011.
The GPU doubles up as a raw SIMD engine array that works with applications over OpenCL and ATI Stream technologies to step up performance. The "Bobcat" Fusion APU integrates x86 processor cores with a high-performance switch that doubles up as a memory controller, which connects to a SIMD engine, a UVD display controller, and platform interfaces that include connection to the southbridge chipset and display I/O.The x86 processor cores are redesigned to cut unnecessary fat (read: caches). It features smaller, but lower latency L1 caches (32 KB L1-I and 32 KB L1-D), advanced branch prediction, full out of the order instruction execution and load/store engines, and a high-performance FPU. The processor supports the AMD64 x86-64 ISA compliant instruction set. As far as SIMD instruction sets go, it seems to have done away with SSE4a and implemented SSSE3 (Supplementary SSE3) ISA instruction set. AMD-V is present to add virtualization support.As far as energy efficiency goes, the design allows AMD to create cores that draw less than 1W of power. The performance-watt equation is a watershed: AMD expects a chip with 90% of the performance of the current notebook CPUs to have less than half the die area, and a fraction of the power draw. The chip is designed to be deployed in a number of packages to suit various designs.
AMD is targeting the lower-mainstream and entry-level PC segments, netbooks and nettops, and cloud-computing clients with the Bobcat architecture. These chips branded under the "Fusion" brand name will be marketed in 2011.