Tuesday, October 25th 2011
AMD Trinity Detailed Further, Compatible with A75 Chipset
AMD detailed its upcoming "Virgo" PC platform that consists of next-generation "Trinity" APU (accelerated processing unit), and current-generation AMD A75 "Hudson-D" chipset. A notable revelation here is that the next-gen APUs will be compatible with AMD A75, although it will be designed for a new socket called FM2. It remains to be seen if FM1 and FM2 are pin-compatible.
"Trinity" packs four x86-64 cores based on the next-generation "Piledriver" architecture, arranged in two Piledriver modules. A module is a closely-knit group of two cores, with certain shared and dedicated resources. Each Piledriver module has 2 MB of L2 cache shared between the two cores. In all, Trinity, with its two modules, has 4 MB of L2 cache without any L3 cache.AMD is talking about a 20% performance improvement over current-generation "Llano" APUs, which use K10 "Stars" architecture cores. Trinity will feature 3rd-generation TurboCore technology that adds a few new power-management and selective overclocking features.
The integrated memory controller will get an overhaul, too. Unlike with K10-based processors that have two independent 64-bit wide memory interfaces that can be configured to work ganged or unganged, Trinity will have a single 128-bit memory interface, the controller will support dual-channel DDR3-2133 MHz memory standard, with DRAM voltages of under 1.5V. Trinity will include a 24-lane PCI-Express root complex, it supports 2-way multi-GPU configurations.
Moving on to the integrated GPU component, AMD promises a 30% performance improvement over Llano's iGPU. The GPU component is DirectX 11 compliant, and features UVD 3 hardware HD video acceleration, with SAMU and native VCE. Featuring AMD Eyefinity technology, this integrated GPU will support up to three displays without needing a discrete graphics card. Eyefinity can be used to step up productivity.
"Trinity" packs four x86-64 cores based on the next-generation "Piledriver" architecture, arranged in two Piledriver modules. A module is a closely-knit group of two cores, with certain shared and dedicated resources. Each Piledriver module has 2 MB of L2 cache shared between the two cores. In all, Trinity, with its two modules, has 4 MB of L2 cache without any L3 cache.AMD is talking about a 20% performance improvement over current-generation "Llano" APUs, which use K10 "Stars" architecture cores. Trinity will feature 3rd-generation TurboCore technology that adds a few new power-management and selective overclocking features.
The integrated memory controller will get an overhaul, too. Unlike with K10-based processors that have two independent 64-bit wide memory interfaces that can be configured to work ganged or unganged, Trinity will have a single 128-bit memory interface, the controller will support dual-channel DDR3-2133 MHz memory standard, with DRAM voltages of under 1.5V. Trinity will include a 24-lane PCI-Express root complex, it supports 2-way multi-GPU configurations.
Moving on to the integrated GPU component, AMD promises a 30% performance improvement over Llano's iGPU. The GPU component is DirectX 11 compliant, and features UVD 3 hardware HD video acceleration, with SAMU and native VCE. Featuring AMD Eyefinity technology, this integrated GPU will support up to three displays without needing a discrete graphics card. Eyefinity can be used to step up productivity.