SK Hynix Details its Upcoming HBM3 Memory: 665 GB/s per Stack

SK Hynix is at the forefront of developing the next generation of stacked high-bandwidth memory, the HBM3 standard. Succeeding the current HBM2e standard, HBM3 will power next-generation HPC and AI processors in high-density multi-chip modules. A Tom's Hardware report citing information from SK Hynix reveals two key details about the new standard. For starters, it could offer per-pin data-rates of 5.2 Gbps, a 44% increase over the 3.6 Gbps that HBM2e caps out at. This results in a per-stack bandwidth of 665 GB/s, compared to 480 GB/s for the HBM2e. A processor with four such stacks (over a 4096-bit wide bus), would hence enjoy 2.66 TB/s of memory bandwidth. It's likely that HBM3 stacks from SK Hynix could implement the DBI Ultra 2.5D/3D hybrid bonding interconnect technology licensed from Xperi Corp.