Bulldozer Core-Count Debate Comes Back to Haunt AMD

[lexluthermiester]

Then you have the group of people that think an Intel i7 chip has 7 cores, the i5 has 5 cores and so on. They might know a little more about computers than your grandma, but they don't really know all that much...

And we all know people like that.

but then, they probably didn't research their product all that well, or read very many reviews, or maybe not even understand computer hardware quite so well in general

And this is only their own responsibility. Not AMD's fault. Regardless of the number of cores, performance is always the more telling point. Reviews will always tell a potential buyer what they're getting into. There is no excuse for buying something like the CPU's in question and whining later about performance or whether or not the claimed 8 cores are actually 8 cores.

What do you mean? If they advertise the choice they made as one they did not, court pretty clearly has authority to say something about it.

Only whether or not there is a claim about false advertising, which the plaintiffs will have to make a case for and they have a serious uphill battle.

 

[FordGT90Concept]

How many "cores" do you see in this picture?

How many in this picture?

Remember, Feng's slides saying "core replication obvious." The defense has the uphill battle here, not the plaintiff. The pictures above make the plaintiff's case as plain as day. Honestly, AMD is better off settling out of court.

 

[seronx]

Orochi die = Orochi being an eight headed/eight tailed snake.

Right A/B and left G/H = L1i/BP/Fetch/Decode
Below A/B and G/H = Cache unit and L2
Left A/B and right G/H = Floating point unit
Inside A/B/G/H = Scheduler/Integer Units/Load-store/registers/etc <== Actual core

Eight actual cores.

 

[FordGT90Concept]

Funny, you had to provide your own picture with boxes pre-drawn on it. Thanks for affirming my point that they aren't obvious.

Let's throw something not x86 into the mix. Here's an Exynos Octa (big-LITTLE design):

Like Sandy Bridge-EP, the cores are obvious.

 

[seronx]

Funny, you had to provide your own picture with boxes pre-drawn on it.

I would say it is better than what is shown in "Design of the Two-Core x86-64 AMD “Bulldozer” Module in 32 nm SOI CMOS" - 25 October 2011

The design from Core(Chip) Multiprocessing(CMP) to Cluster-based(Chip) Multi-threading(CMT) needs to be displayed.
A CMP module will always have a single core.
A CMT module within the same space as a CMP module will always have 1+x cores.

 

[FordGT90Concept]

That document was written entirely by AMD employees:
https://ieeexplore.ieee.org/document/5746227/authors#authors

None of the citations appear relevant to the court case.

TL;DR: the jury would have to take AMD's word for it.

 

[lexluthermiester]

TL;DR: the jury would have to take AMD's word for it.

Just like they'd have to take any other CPU maker's word for it. Your point was pointless.

 

[Midland Dog]

That is an incorrect assessment. The FPU works as two independent units unless either core needs to execute a 256-bit FP op. The units were designed to fuse together for (relatively rare) 256 bit operations.

Calling a module a single core because of how the FP unit works would be akin to having two 3" paint brushes and calling them a single 6" brush because you *can* hold them together to paint a thicker line.

this just leads back to the original arguament, the definition of a core, the best i have heard was that a core is able to do independant logic and calculations without being tied to any other sillicon, dont know how accurate it is but we need to find an actual definition. Would i not be able to call a 4 core chip with hyperthreading an "8" core because it is able to execute instructions on 8 threads?

 

[FordGT90Concept]

I wouldn't be against IEEE establishing standards not unlike SAE and horsepower/torque measurement. Consumers have the right to know that the cores they are buying are independent, conjoined, or multi-threaded. Intel did a good job with the latter via their Hyper-Threading trademark; conversely, AMD does a poor job at informing consumers about Zen's multi-threaded capabilities. Conjoined is always going to have inferior performance (but lower cost) compared to independent which is something consumers should know about.

 

[londiste]

Intel did a good job with the latter via their Hyper-Threading trademark; conversely, AMD does a poor job at informing consumers about Zen's multi-threaded capabilities.

AMD is doing perfectly good job with Zen's multi-threaded capabilities. SMT is an industry standard term and fits the situation perfectly. Intel's HyperThreading is SMT with a trademarked name slapped on it.

this just leads back to the original arguament, the definition of a core, the best i have heard was that a core is able to do independant logic and calculations without being tied to any other sillicon

For the definition to be effective - not any logic and calculations but specifically execute instructions of the given instruction set.

 

[lexluthermiester]

the best i have heard was that a core is able to do independent logic and calculations without being tied to any other silicon

And that about sums it up. Actual specific components don't matter.

 

[Shambles1980]

And that about sums it up. Actual specific components don't matter.

well it does or you can argue 4c8t cpus are 8cores

 

[lexluthermiester]

well it does or you can argue 4c8t cpus are 8cores

No you can't.

 

[FordGT90Concept]

The only difference is one wide integer cluster versus two narrow ones. The frontside and the backside is otherwise the same.

 

[lexluthermiester]

The only difference is one wide integer cluster versus two narrow ones. The frontside and the backside is otherwise the same.

Exactly. The difference is that with SMP, a single core is toggling between tasks/threads so quickly that to us it seems to be handling them at the same time, when in actuality it isn't.

 

[FordGT90Concept]

Guess what the fetcher, core interface unit, and floating point cluster does in Bulldozer.

Look at it this way:
[table=head]Architecture|Trans|Organization|Source
Vishera|1.2|4m/8t|AnandTech
Sandy Bridge|1.16|4c/8t|AnandTech
Ivy Bridgee|1.4|4c/8t|AnandTech
Sandy Bridge-EP|2.27|8c/16t|Overclock[/table]
One of these things is not like the other...

You can see performance numbers on the AnandTech link. Hint: i7-3770K 3.5 GHz almost always wins against FX-8350 4.0 GHz and often by a long mile. Why is that? Because Intel beats the hell out of their dual-threaded cores where AMD divided and conquered in their dual-threaded cores. When Intel is faced with only a single thread, it pulls out all of the stops to get it done. AMD can't. Even when you async like a boss, AMD's shared nature comes back to haunt it often doing 10-50% worse than it should. Can't win single, can't win dual, can't win in terms of transistor count either (whole reason why AMD pursued it). Zen and Bulldozer proves "conjoined cores" were a bad idea. Isolating hardware resources from threads that could use it makes little sense.

 

[mouacyk]

Zen and Bulldozer proves "conjoined cores" were a bad idea. Isolating hardware resources from threads that could use it makes little sense.

It served the purpose of a budget design, reducing transistor requirements, reducing die size, increasing yields, and presenting cheaper alternatives. I would reserve the term innovation for designs that actually improve performance, while minimizing cost, unlike how many fans are describing Bulldozer.

 

[FordGT90Concept]

Look at the transistor counts though: there's virtually no savings. Die size is a combination of transistor count and process: no savings. Yields are mostly the result of die size: no savings. Cheaper? Only if you want an inefficient processor that's really good at integer math on many threads. Judging by the benchmarks, that's not the bottleneck for most software.

 

[mouacyk]

Based on the white paper, AMD was supposed to accomplish the listed things. Did they know during design that they wouldn't be able to realize those reductions but went for it anyways, to avoid completely busting?

 

[FordGT90Concept]

It costs billions to design and prototype a new architecture. Once they got so many billions in, they were committed to bringing it to the market to get some revenue off it.

 

[Zyll Goliat]

 

[londiste]

He is taking the same route of blaming single FPU. And ignoring everything else on the same picture in the module that is part of a CPU core and shared

 

[FordGT90Concept]

He is taking the same route of blaming single FPU. And ignoring everything else on the same picture in the module that is part of a CPU core and shared

Because that's the layman's way of looking at it (stands out in diagrams). As I pointed about before, the transistor count is a dead giveaway that Bulldozer isn't remotely close to being an 8-core CPU. It's a 4-core, 8-thread CPU with dedicated resources for each thread (which is actually really stupid from a performance point of view because this enforces underutilization of hardware resources).

Cores are independent processors. They don't share anything--they communicate via memory subsystems. Each processor pulls the data it needs, executes it, and pushes it back. At no point does one core interfere with another (unless there's some kind of intentional memory lock to prohibit thread cross references). 7zip compression proves Bulldozer "cores" are not independent.

 

[lexluthermiester]

7zip compression proves Bulldozer "cores" are not independent.

Out of curiosity, how is that conclusion reached?

 

[mouacyk]

Out of curiosity, how is that conclusion reached?

Might be referring to this test done at Anandtech, where conclusion is flawed. If you normalize the 7zip scores to the same clock speed, they are identical. The relevance to this thread is that the FX-8150 is claiming 8 cores but the 2600K is only claiming 4 cores: