AMD Zen 3 Could Bid the CCX Farewell, Feature Updated SMT

[Adam Krazispeed]

my version lol

i like doing these custom designs for fun

 

[JohnWal]

Maybe the gains are too small to be worthing.

Maybe not worth it for some configurations. Interesting that AMD call out in their slides Rome / Milan "9" DIE MCM. That does not say there will not be other Milan configurations with more chiplets or on IO die cache. But, if you followed the previous explanations from AMD on why they architected things they way they do they are very focused on transistor/power budget and prioritizing the evolution of the architecture. Improving the cache on the chiplets seem to be the next low hanging fruit as this will help across the whole Zen portfolio.