Intel Plans to Volume Manufacture Nanowire/Nanoribbon Transistors in Five Years

[AleksandarK]

Semiconductor manufacturing is a hard business. There is a constant need for manufacturers to compete with each other and if they don't, they get left behind. Intel, as one of the biggest semiconductor makers in the world, is always trying to invent new technologies spending massive R&D funds on semiconductors. New technologies such as nanowire/nanoribbon transistors, which are supposed to enable transistor sizes unimaginable now, are on its way to make it in the hand of consumers. During the international VLSI conference, Intel's CTO Mike Mayberry held a presentation about how Intel plans to address the demand for more compute by showing off new technologies.

With a presentation titled "The Future of Compute", Mr. Mayberry made some exciting claims and predictions. So far, we have been used to FinFET transistors since the 22 nm node from Intel. However, as nodes get smaller the gate of the transistor is not enough to keep it from switching randomly. So to avoid that problem Intel, along with other semiconductor manufacturers like Samsung, created a solution called Gate-All-Around FET (GAAFET). This technology takes a transistor fin and wraps in around all sides (see picture below), so the gate has better switching control, preventing random switching and errors. As a fin, nanowire or nanosheet (wider option from nanowire) can be used and they can be stacked. These allow for additional control of tailoring whatever a node will be used for high performance or low power. Intel predicts that they will start high volume manufacturing of silicon based on this technology in five years. This is setting an important milestone for Intel as well as other industry players, as now everyone will rush to deliver it first. It is now a waiting game to see who will actually come out with it first.


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[steve360]

Intel once had plans for 10nm out as early as 2015.

5 years later, they are still struggling with it.

So...yeah...Intel nanowire in 2030. Maybe.

 

[watzupken]

Intel once had plans for 10nm out as early as 2015.

5 years later, they are still struggling with it.

So...yeah...Intel nanowire in 2030. Maybe.

LOL. I was thinking the same. But I do hope they learned from their lesson this time round and not get themselves into the same predicament that soon.

 

[$ReaPeR$]

i will believe it when i see it.

 

[Vayra86]

Man, they sure are creative in their press releases.

Is someone counting? Is that dedicated Intel feed up yet?
Does anyone care yet?

 

[ncrs]

The second picture attached to this article is from Samsung detailing their foundry roadmap, probably should give credit/indicate it's not from Intel nor is it Intel technology.

 

[Assimilator]

MBCFET is Samsung's version of this tech, promising 50% more power, 30% more perf, and 45% less area. Should be available from them from next year.

 

[TheoneandonlyMrK]

Man they look expensive.

It's going to take a fair few steps to get them produced, even with EUV.

 

[1d10t]

Such amazing achievement from Intel, they take 14nm to a new highest ever.

 

[Visualzero]

Intel Today: We are going to have nanowire transistors in production in 5 years!
Intel in 5 years: Here's our latest manufacturing innovation in production: 14nm++++++++++++++++++++++!

 

[ppn]

5nm GAAFET in 5 years. Yeah.

 

[Pinktulips7]

Intel once had plans for 10nm out as early as 2015.

5 years later, they are still struggling with it.

So...yeah...Intel nanowire in 2030. Maybe.

Hi AMD fan intel 14nm=AMD 10nm..............Dude get your info right.........

5nm GAAFET in 5 years. Yeah.

Oh yea AMD Boy

 

[ZoneDymo]

Hi AMD fan intel 14nm=AMD 10nm..............Dude get your info right.........


Oh yea AMD Boy

Interesting post history you got there buddy

 

[WeeRab]

Intel are more a marketing company now.
Engineering? Not so much.

 

[bug]

New technologies such as nanowire/nanoribbon transistors, which are supposed to enable transistor sizes unimaginable now

Things are already hard to imagine when you figure there's like 5 Si atoms in a nanometer (probably less, because they don't stack like books).

 

[Master Tom]

Things are already hard to imagine when you figure there's like 5 Si atoms in a nanometer (probably less, because they don't stack like books).

The term "10 nm" is simply a commercial name for a generation of a certain size and its technology, and does not represent any geometry of the transistor.

 

[KarymidoN]

Intel roadmaps KEKW

 

[bug]

The term "10 nm" is simply a commercial name for a generation of a certain size and its technology, and does not represent any geometry of the transistor.

Certain size of what, if not transistor features?

 

[Master Tom]

Certain size of what, if not transistor features?

A certain size of the transistors. But it is not 10nm. They are much bigger. 10nm is only a marketing name.
Transistor Gate Pitch is 68nm, the Interconnect pitch is 51nm, the Transistor Fin Pitch is 42nm and Transistor Fin Height is 49nm.

 

[bug]

A certain size of the transistors. But it is not 10nm. They are much bigger. 10nm is only a marketing name.
Transistor Gate Pitch is 68nm, the Interconnect pitch is 51nm, the Transistor Fin Pitch is 42nm and Transistor Fin Height is 49nm.

I was referring to the actual transistor element sizes. They're getting smaller and smaller, leaving said elements with fewer than 1,000 electrons to work with. Boggles the mind (at least mine).