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Intel Core i7 "Rocket Lake" Chips to be 8-core/12-thread?

btarunr

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It's been rumored for some time now, that the 14 nm "Rocket Lake-S" silicon has no more than 8 CPU cores, giving Intel's product managers some segmentation headaches between the Core i7 and Core i9 brand extensions. The current 10th Gen Core i9 chips are 10-core/20-thread, and Core i7 8-core/16-thread. The 10th Gen Core i5 chips are 6-core/12-thread, and this won't change with the 11th Gen "Rocket Lake." What will change, however, are the core-counts of the Core i7 and Core i9 processors, according to a leaked roadmap slide scored by VideoCardz.

With no more than 8 "Cypress Cove" cores on the "Rocket Lake-S" silicon, the 11th Gen Core i9 will be 8-core/16-thread. The 11th Gen Core i7, however, will be 8-core/12-thread. We don't know how this would work out, but Intel dropped hints toward it with the current 10th Gen Core "Comet Lake," whereby end-users have the ability to toggle HyperThreading (HTT) on a per-core basis. Older generations of Intel processors only allowed a global toggle of HTT. This would mean 4 out of 8 cores on the Core i7 "Rocket Lake-S" will have HTT permanently disabled. We predict that two of these will likely be the processor's favored cores, capable of sustaining the highest boost clocks under the Turbo Boost Max 3.0 algorithm, to which the OS thread scheduler will send the maximum traffic. The roadmap slide also suggests that Intel could standardize the vPro feature-set to its unlocked "K" processors with the 11th Gen.



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With 12 threads 4 only 4 cores will have HT enabled, unless my maths is completely off (like HT for half the cores in the new i7)
 
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That actually seems like a smart move. It's basically the core parking that Ryzen users were doing, but in hardware so that your average Joe can get better thread scheduling without having to think about it.

I like the idea of a CPU and OS that are more 'priority' aware than curent AMD/Intel offerings and Windows 10. In an ideal world user actions/operations are never fighting the system/background processes for resources. Not as extreme as BIG.little but certainly an OS/CPU that knows when other threads are waiting on information from one or two key threads, to isolate those threads to the fastest dedicated cores and not have them compete for resources.

Seems obvious, and we're slowly getting there with both Windows and CPUs. Hell, perhaps there's more merit to the BIG.little designs in performance desktops, coupled with not just tiered CPU cores but also tiered RAM and tiered storage.
 

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Only 16 thread maximum is very bad for the user.
There is no indication that a 14nm Intel CPU with only 8 cores no matter the IPC improvement will be able to compete with the 32-thread Zen 3 and even higher Zen 4.
 
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Less over reliance pseudo threading is probably for the better the direction things are headed towards higher and higher amounts of actual physical cores.
 

ARF

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Less over reliance pseudo threading is probably for the better the direction things are headed towards higher and higher amounts of actual physical cores.

I don't think there is any technical benefit in removing the HT.
Probably just artificial product segmentation dictated by the marketing.

Ryzen 7 4800U with SMT on scores 25% higher than Ryzen 7 4700U the same 8 cores but without SMT.
 
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I do hope this information is incorrect. Unbalanced core configurations like this would be a mess for the OS schedulers.

If Rocket Lake only goes to 8 cores, I would prefer it to be branded as "i7", and the "i9" branding to be kept for HEDT. Ice Lake-X will easily cover >8 cores. Putting Ice Lake-X/SP dies on LGA 1200 would also be possible, but I don't like the idea, as it would push the power requirements even higher.
 
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With 12 threads 4 only 4 cores will have HT enabled, unless my maths is completely off (like HT for half the cores in the new i7)

Yup, bta's math is wrong. 12 virtual cores - 8 physical cores = 4 virtual cores. Which would mean half of the chip's physical cores would have HT enabled and the other half disabled - a far more logical split. Wonder if this is for heat reasons on 14nm, or just die harvesting - or more excitingly, perhaps Intel is going to try a big.LITTLE approach with 4 Skylake cores with HT, plus 4 Atom cores? (I mean, since we're all speculating here, might as well go big, right?)

More interesting to me is the slide note that RKL is dumping SGX. That pretty much amounts to an admission of defeat on Intel's part regarding that attempt at security.

Finally the CPU gets 20 PCIe lanes, which brings it up to parity with Ryzen at least.
 
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Yup, bta's math is wrong. 12 virtual cores - 8 physical cores = 4 virtual cores. Which would mean half of the chip's physical cores would have HT enabled and the other half disabled - a far more logical split. Wonder if this is for heat reasons on 14nm, or just die harvesting - or more excitingly, perhaps Intel is going to try a big.LITTLE approach with 4 Skylake cores with HT, plus 4 Atom cores? (I mean, since we're all speculating here, might as well go big, right?)

More interesting to me is the slide note that RKL is dumping SGX. That pretty much amounts to an admission of defeat on Intel's part regarding that attempt at security.

Finally the CPU gets 20 PCIe lanes, which brings it up to parity with Ryzen at least.

SGX from what I'm aware was also removed from Cascade Lake-X so no surprise there.
 
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Only 16 thread maximum is very bad for the user.
There is no indication that a 14nm Intel CPU with only 8 cores no matter the IPC improvement will be able to compete with the 32-thread Zen 3 and even higher Zen 4.


Rocket-Lake-S is laptop parts aimed for 2021 most likely. The target market has only just experienced its first 6-core products this year, so 12 threads is fine.

There's no way Zen 3 laptops with 32 threads are going to be 'mainstream' by the time Rocket Lake is replaced with Intel 12th-Gen. You might see some boutiques cram a desktop Zen3 CPU into a laptop because there is always at least one vendor pushing the envelope, but mainstream laptops aren't going to go beyond 8 cores in 2021 in my opinion and I suspect we'll see a lot of 8-16 thread stuff in the 15-25W TDP range covering 90%+ of the market.

I do hope this information is incorrect. Unbalanced core configurations like this would be a mess for the OS schedulers.
If you were on 1st-gen Ryzen you'd know that unbalanced core configurations like this are actually just a workaround to improve the mess that is the "Windows 10 scheduler".

Since then, the Windows10 scheduler has improved but core-parking and SMT/HT isolation for preferred cores is still better than letting Windows guess (poorly) at what process should run on each core - provided, that is - that you have cores/threads in abundance. I wouldn't be doing this on a quad-core, that's for sure!
 
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The thread contention from non physical cores becomes a larger issue on the higher end TR/Epyc chips. You get to a point where turning off the additional threads entirely is more ideal in many cases since the OS itself does a poor job managing them intelligently enough.
 

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This. Is. Ridiculous. It only exists for one reason: because AMD forced Intel's hand, Intel has to create more market segmentation from a smaller selection of products. AMD does this between the 3800X and 3700X via different clock rates. Rocket Lake-S performance is apparently so abysmal that separating clocks isn't enough so they had to come up with something new. That something new was being able to disable the scheduling of extra threads on select cores.

I'll just come out and say it: this is anti-consumer.

Yup, bta's math is wrong. 2 virtual cores - 8 physical cores = 4 virtual cores.
It's 12 threads and 8 cores. Four cores are not accepting an extra thread.

I hope so, but I doubt it. I see why Intel is doing it (see above) even if I don't approve.
 
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I don't believe so what I speculate is perhaps Intel has two chips one that is 4c and another that is 4c/4t and the the 4c chip is the initial chip recognized by the OS is what I'd presume. In that scenario you'd see some nice upside from having the first 4 physical cores all lacking any hyper-threading while the last 4 cores would have it and smooths over erratic more heavily threaded performance better at the cost of the added latency it adds to the overall tasks. At least something akin to that is what I presume to be the case possibly.
 

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I don't believe so what I speculate is perhaps Intel has two chips one that is 4c and another that is 4c/4t and the the 4c chip is the initial chip recognized by the OS is what I'd presume. In that scenario you'd see some nice upside from having the first 4 physical cores all lacking any hyper-threading while the last 4 cores would have it and smooths over erratic more heavily threaded performance better at the cost of the added latency it adds to the overall tasks. At least something akin to that is what I presume to be the case possibly.
Too costly from a manufacturing/SKU perspective. I even doubt this is the result of binning because the odds of a defect happening only in the hyperthreading circuits in volumes that warrant another SKU are extremely remote. Hyperthreading functions by sharing execution units so that defect has to be so precise, odds are it must be intentional.

BIG.little has never taken off in the PC space because the power consumption difference between the two is negligible when you consider how much performance you're giving up at the top end for it. The little processor is seen as a waste of transistors when it could run just one of the BIG cores at the appropriate clock to compensate.

I suspect operating system schedulers will just do the second threads last.
 
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This looks like there are 4 cores with HT and 4 cores without HT, (8)+4. It could mean a great many things. Hyper-threading is notoriously ineffecient when it comes to power consumption and hardware-disabling the HT on could be a good way of keeping power down.
 
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I'm thinking it could lead to higher turbo boost peak frequency or longer duration at peak frequency across more turbo cores possibly. We could be looking at it from the wrong angle as well. Intel could set it up in a turbo/base clock/turbo arrangement in a four window pane quadrant so to speak or it could be inverse of that with base clock/turbo/base clock where the turbo is situated between two base clock cores and peaks higher in short bursts and it might even offer both with a top half/bottom half kind of design that inverts with a toggle to decide which takes priority with the OS scheduler. Really all we can do is speculate til more information is provided. Think of it like have the option duty cycles for turbo/base clock with a possible toggle switch so it could be like _-_ or -_- with the rise or fall peak and dip on the base clock or turbo speed arrangement. Who knows really, but it's quite obvious AMD forced Intel's hand a bit or they wouldn't probably be resorting to such a obscure thing in the first place.
 
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perhaps Intel is going to try a big.LITTLE approach with 4 Skylake cores with HT, plus 4 Atom cores? (I mean, since we're all speculating here, might as well go big, right?)
That was my first thought too, the Big/Little approach.
 
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Possibly. Copy and pasted the 12T from the i5 row below it perhaps and it's really an 8C/8T in the exact same way that the 9700K is an i7 without HT

Still, the idea of defaulting to a mix of HT and non-HT cores is interesting and does seem to be the direction intel is moving in....
 
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Cycle duties for better peak turbo performance or generally more sustainable turbo performance is the best you can hope for with a 8c/12t setup.

-_-_-_- <---higher peaks
_-_-_-_ <---lower peaks
_--_--_--_ <---high sustained peaks
__-__-__-__ <---lower sustained peaks, but could use that to peak higher briefly
 
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At last some sense.

I really hope we stick to 8/16 for sometime and see some really big leaps on the cores architecture.
The core count race sounds good for marketing until you realize that it's useless for 90% of your steam library.

I do encourage progressively bigger thread counts on the HEDT space though since in that kind of workload/usage it makes sense, but this conversation isn't about that market so it's irrelevant ;)
 
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or more excitingly, perhaps Intel is going to try a big.LITTLE approach with 4 Skylake cores with HT, plus 4 Atom cores?
That would be a stretch...

IMHO, this is just Intel doing more fine-grained binning. That's it, they're just trying to maximize resources.
 

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6/12 = 7,5 Core
8/12 = 9 Core
with 4 threads capable of 100% load, and 8 threads limited to 62.5% when CPU is fullly loaded.
that could be very promising for DX11 titles that use only 1 thread for the DX11 or some other similar scenario.
8/16 = 10 Core
 

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At last some sense.

I really hope we stick to 8/16 for sometime and see some really big leaps on the cores architecture.
The core count race sounds good for marketing until you realize that it's useless for 90% of your steam library.

I do encourage progressively bigger thread counts on the HEDT space though since in that kind of workload/usage it makes sense, but this conversation isn't about that market so it's irrelevant ;)


Your Windows will feel better with as many as possible physical cores because it offloads the constant switching of processes over less cores.
It's better to have 12 cores 24 threads loaded at 50%, than to have 6 cores 12 threads loaded to 100%, thus constant risk of micro-stuttering.
 
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Your Windows will feel better with as many as possible physical cores because it offloads the constant switching of processes over less cores.
It's better to have 12 cores 24 threads loaded at 50%, than to have 6 cores 12 threads loaded to 100%, thus constant risk of micro-stuttering.

Ofc i agree more cores is better than no improvement at all.

But if we had the ability to choose, then a new architecture would win every day for the vast majority of games.

What are the chances of a game being bottle-necked by 12 threads vs low frequency/IPC? ( Both are unlikely scenarios but we're talking paper performance now)

The market is starving for a leap in IPC.

In recent years the average pc has gotten a 100% or even 200% boost in core counts.

When was the last time we saw a consistent two digit % in clock for clock performance? The answer sums it.
 
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