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NVIDIA "Ada Lovelace" Streaming Multiprocessor Counts Surface

btarunr

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Possible streaming multiprocessor (SM) counts of the various NVIDIA "Ada Lovelace" client-graphics GPUs surfaced, allegedly pieced together from code seen in the recent NVIDIA cyberattack data-leak. According to this, the top-dog "AD102" silicon has 144 SM, the next-best "AD103" has 84. The third-largest "AD104" silicon has 60. The performance-segment "AD106" has 36, and the mainstream "AD107" has 24. Assuming the number of CUDA cores per SM in the "Ada Lovelace" graphics architecture is unchanged from that of "Ampere," we're looking at 18,432 CUDA cores for the "AD102," an impressive 10,752 for the "AD103," 7,680 cores for the "AD104," 4,608 for the "AD106," and 3,072 for the "AD107."



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something off on your AD104 numbers, I get 7680 cuda cores (60x128).
All rest seem right.
 

btarunr

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So can we expect AD102 as 50xx cards?
 
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Looks like a solid step up again. A proper upgrade from Ampere. Not bad, this might be a winner for all those emerging technologies.

Hopefully endowed with a normal stack of VRAM this time. And under a normal TDP... please 104, don't exceed 250W.
 
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I fully expect Nvidia to keep similar pricing as Ampere or possibly a +15% markup.

If the last two years and launches have shown anything is that MSRP is a figment of the imagination.

Those still sitting on the 10 Series cards definitely will have something worthwhile for upgrading.

I will be interested in how they far at 1080p and 1440p.
 
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In lieu of current events, nvidia should start naming its products after hackers. :D IDK, Elliot Alderson or Kevin Mitnick for starters?
 
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In lieu of current events, nvidia should start naming its products after hackers. :D IDK, Elliot Alderson or Kevin Mitnick for starters?
Neo too!

It's going to be 40xx most likely.
I thought about that at first, but I think these are still in the planning stages, it doesnt really say. I also think with this data release, Nvidia might push back release dates.
 
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I fully expect Nvidia to keep similar pricing as Ampere or possibly a +15% markup.

If the last two years and launches have shown anything is that MSRP is a figment of the imagination.

Those still sitting on the 10 Series cards definitely will have something worthwhile for upgrading.

I will be interested in how they far at 1080p and 1440p.
You might be in for a very rude shock.
 
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Hopefully there is a decent uplift per SM if not people in the low end are going to be getting the shaft again.....
 
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Hopefully Nvidia secured enough TSMC 5nm to produce the entire Ada lineup, not just the top end chip and rely on Samsung for the lower ends.
 
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Apart from AD102, it's not that impressive, considering that nvidia changed the meaning of the term "CUDA core" with Ampere. SM numbers are pretty much comparable to Turing and Ampere.

On a different note, I'm hoping we'll see more improvements in power consumption. I have no desire to buy and feed a 300+ W GPU.
 
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Hopefully Nvidia secured enough TSMC 5nm to produce the entire Ada lineup, not just the top end chip and rely on Samsung for the lower ends.

I think this will continue to be an issue going forward... Nvidia is putting out more gpu per quarter than they did during Turing lifetime and it still hasn't helped demand. Beyond that the amount Nvidia is having to pay for wafers leads me to believe that we are going to see a large jump in pricing at least MSRP.... The market will dictate likely even higher pricing anyways so it is what it is.

Apart from AD102, it's not that impressive, considering that nvidia changed the meaning of the term "CUDA core" with Ampere. SM numbers are pretty much comparable to Turing and Ampere.

On a different note, I'm hoping we'll see more improvements in power consumption. I have no desire to buy and feed a 300+ W GPU.

Should be much better TSMC 5nm is a huge step up vs Samsung 8nm
 
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In lieu of current events, nvidia should start naming its products after hackers. :D IDK, Elliot Alderson or Kevin Mitnick for starters?

I thought they were switching to Satori, Vitalik and the like first?
 
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wasn't the SM count 68 for the GA102??
 
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Should be much better TSMC 5nm is a huge step up vs Samsung 8nm
They said the same about Samsung 8 nm vs TSMC 12 nm, yet I see nothing of it. All I can say at this point is, fingers crossed.
 
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They said the same about Samsung 8 nm vs TSMC 12 nm, yet I see nothing of it. All I can say at this point is, fingers crossed.

'They' who said that were a bunch of idiots because it was very clear Samsung 8nm isnt a big difference from TSMC 12nm. Its all still DUV 14nm range crap from yesteryear maybe with a few more passes.
 
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They said the same about Samsung 8 nm vs TSMC 12 nm, yet I see nothing of it. All I can say at this point is, fingers crossed.

Samsung's 8nm is pushed way beyond it's efficiency curve for the sake of the extra performance....... And yeah as @Vayra86 saying isn't a huge step up from Tsmc 12nm density wise.
I would still expect the top end 80/90 tier 4000 series cards to be pushed hard to keep parity with RDNA3 though in rasterized performance.
 
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are these going to be TSMC 5nm?
 
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Yeah, mine were suggestions. Scene is large and there are many honorable mentions.

I was joking. Satori and Vitalik are the respective inventors of Bitcoin and Ethereum ;)
 
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I thought about that at first, but I think these are still in the planning stages, it doesnt really say. I also think with this data release, Nvidia might push back release dates.
Some driver sources that I totally didn't look through for Ada have 2019 copyrights apart from the more generic 2016 ones that most of the files there have. We most likely underestimate how long those things take. It was from that leak we learned about Blackwell which was totally unknown for us. This would fit the official NV presentation with "Ampere Next" and "Ampere Next Next" perfectly.

As far as I know, yes.
I wouldn't be so sure. Ampere was built on both 8nm Samsung and 7nm TSMC depending on the market segment. With Ada we might get the entire line on some Samsung process and Hopper getting TSMC 5nm due to higher profit margins in the professional/server markets. Unless NV officially confirmed 5nm for Ada, but I'm not aware of such announcement.
 
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One of the reasons CUDA counts jumped so much from Turing to Ampere was a reclassification of what a CUDA core was. By removing INT32 from the classification of a CUDA core, it allowed them to double the core count by merely adding FP32 logic to existing INT32 cores. In a hypothetical situation where there are zero INT32 requirements, then that's fine. But that's also a vanishingly unrealistic scenario.

A Turing CUDA core is a pair of execution units - one for INT32 and one for FP32. The two are counted as one CORE on paper.
Ampere's CUDA core pair is still INT32 and FP32, but the INT32 can also run FP32 with the downside that you now have two FP32 units competing for the same Registers, cache, LD/ST etc compared to Turing's one, and FP32 performance is halved if INT32 calculations need to be run.

Ampere does have more logic but performance didn't double like the core count implied as many of the things that previously constituted a CUDA core weren't doubled at all.

I'm wondering if the same thing has happened here with Lovelace, or whether they're just squeezing way more transistors in with TSMC's denser process. If that's true, we're going to see some astronomical costs and TDPs!
 
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