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NEO Semiconductor Launches Ground-Breaking 3D X-DRAM Technology, A Game Changer in the Memory Industry

TheLostSwede

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NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash and DRAM memory, today announced the launch of its ground-breaking technology, 3D X-DRAM. This development is the world's first 3D NAND-like DRAM cell array that is targeted to solve DRAM's capacity bottleneck and replace the entire 2D DRAM market. Relevant patent applications were published with the United States Patent Application Publication on April 6, 2023.

"3D X-DRAM will be the absolute future growth driver for the Semiconductor industry," said Andy Hsu, Founder and CEO of NEO Semiconductor and an accomplished technology inventor with more than 120 U.S. patents. "Today I can say with confidence that Neo is becoming a clear leader in the 3D DRAM market. Our invention, compared to the other solutions in the market today, is very simple and less expensive to manufacture and scale. The industry can expect to achieve 8X density and capacity improvements per decade with our 3D X-DRAM."




NEO Semiconductor's 3D X-DRAM is a first-of-its-kind 3D NAND-like DRAM cell array structure based on capacitor-less floating body cell technology. It can be manufactured using today's 3D NAND-like process and only needs one mask to define the bit line holes and form the cell structure inside the holes. This cell structure simplifies the process steps and provides a high-speed, high-density, low-cost, and high-yield solution. Based on Neo's estimates, 3D X-DRAM technology can achieve 128 Gb density with 230 layers, which is 8 times today's DRAM density.

An industry-wide effort is underway to bring 3D to DRAM. Adopting 3D X-DRAM involves leveraging the current mature 3D NAND process only, unlike many of the alternatives for moving DRAM to 3D proposed by academic papers and researched by the memory industry. Without 3D X-DRAM, the industry faces waiting potential decades, navigating inevitable manufacturing disruptions, and mitigating unacceptable yield and cost challenges. 3D X-DRAM is the necessary solution to address the increase in demand for high-performance and high-capacity memory semiconductors driven by the next wave of artificial intelligence (AI) applications such as ChatGPT.

"Evolving from 2D to 3D architectures has introduced compelling and extremely valuable benefits to NAND flash, so achieving a similar evolution for DRAM is highly desirable industry-wide," said Jay Kramer, President of Network Storage Advisors. "NEO Semiconductor's innovative 3D X-DRAM allows the memory industry to leverage current technologies, nodes and processes for enhancing DRAM products with NAND-like 3D architectures."

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TheLostSwede

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NEO Semiconductor, a "leading developer"

In what alternate reality do these words make sense? :')
As in, they're not a new company and they've apparently been working on this and other tech for a while?

And why can't they be a leading developer in their field?
It doesn't mean they're a leading producer of anything.
 
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As in, they're not a new company and they've apparently been working on this for a while?

And why can't they be a leading developer in their field?
It doesn't mean they're a leading producer of anything.
Leadership in RAM manufacturing and development? Three manufacturers account for about 95% of the market share: Samsung, Micron, and SK Hynix.

So don't blame me for finding the set of words strange.
 

TheLostSwede

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Leadership in RAM manufacturing and development? Three manufacturers account for about 95% of the market share: Samsung, Micron, and SK Hynix.

So don't blame me for finding the set of words strange.
But this is a new technology entirely, which is what they seem to be working on in general.
Someone can be a leading developer of something, even though it never makes it onto the market.
Just look at Rambus...
 
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Lol this isn't making any sense whatsoever, where is the transistor in this design? These are literally the most useless diagrams I've seen in my life...

Where are the patents?
 

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Lol this isn't making any sense whatsoever, where is the transistor in this design? These are literally the most useless diagrams I've seen in my life...

Where are the patents?
Does this help? Unfortunately there isn't much more info available from the company at the moment.

1683127594330.png
 
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So it has to activate the whole layer of the array in one go? Since the word line is a whole layer... This will drive up the number of arrays required immensely and you'll have a huge amount of ancillary circuitry that can't be placed under the arrays... I'll wait until I see a functioning sample...
 
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Looks kinda like a nano-scale adaptation of 'stacked' DDR1 DRAM I've seen.

At the very least, this'll be IP that can be built off of. TB-density DRAM looks closer than ever (yet, still 'a ways off')
 
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Interesting. I look forward to seeing something tangible sooner rather than later. Altho my assumption is they will lease or sell the ip to the big dogs. Who knows.
 
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I remember Intel briefly manufactured motherboards/chipsets for RAMBUS RAM, but that didn't last long at all. Are Intel and AMD willing to embrace this new memory tech. and design CPU's around it? Because memory controllers haven't been separate, discrete chips for a long, long time.
 
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So it has to activate the whole layer of the array in one go? Since the word line is a whole layer... This will drive up the number of arrays required immensely and you'll have a huge amount of ancillary circuitry that can't be placed under the arrays... I'll wait until I see a functioning sample...
Those drawings may be intentionally very inaccurate, and word lines may be actually lines. 3D NAND also has lines for control signals, not just entire planes.

I'm looking at this article at SemiEngineering, and the capacitor-less cell in Fig 5 does look like this new transistor, just reshaped. It also looks like a plain mosfet, which has an insufficient capacitance to store data, so there must be some secret sauce at work too.

Interesting. I look forward to seeing something tangible sooner rather than later. Altho my assumption is they will lease or sell the ip to the big dogs. Who knows.
Of course, the most they can hope for is sell the IP. Or themselves, for that matter. They can't just suddenly (I mean, in a decade) the Samsungs and Microns. They also have competition - the article I linked explains ideas by at least three other companies, none of them known for memory manufacturing, and manufacturers too have some R&D money to put aside.

These companies are taking some ideas from 3D NAND development, but why wouldn't they skip some early stages in NAND development and jump straight to ... QLC! Shingled, too!
 
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Leadership in RAM manufacturing and development? Three manufacturers account for about 95% of the market share: Samsung, Micron, and SK Hynix.

So don't blame me for finding the set of words strange.
No one said anything about manufacturing. This is an R&D company deveoping DRAM technologies.
 
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How is this different from HBM RAM?
 
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These companies are taking some ideas from 3D NAND development, but why wouldn't they skip some early stages in NAND development and jump straight to ... QLC! Shingled, too!
If they want to keep read/write latencies down, they won't be going straight to QLC :laugh:
They really did just use the 3D NAND topology. Obviously the transistor etc have to be designed differently. It would be interesting to see if/how they use the trench cell, etc.
 
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Unless they're cooking up something themselves.


Completely different. They're building many layers, potentially hundreds, on a single silicon die, not just stacking dies.
So 400w cpu 600w gpu and 600w stacked dram
 
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