Intel "Diamond Rapids" Xeon to Debut on 9,324-Pin LGA9324 Socket

[AleksandarK]

Intel's upcoming "Diamond Rapids" Xeon processors are going to debut on a remarkably large new LGA9324 socket, according to a recently leaked photograph shared by hardware leaker HXL on X. The image appears to show a socket with 9,324 contact points, and when auxiliary debug pins are included, the total connection count may exceed 10,000. If this turns out to be accurate, it would surpass Intel's current flagship LGA7529 and AMD's SP5 sockets in raw pin density. Earlier reports indicated that Diamond Rapids will require Intel's next-generation Oak Stream platform, which in turn will use this upgraded socket. Within Intel's roadmap, the seventh-generation Xeon family is intended to replace the existing Granite Rapids lineup in both Advanced Performance (AP) and Scalable Performance (SP) segments. Prototype coolers from Dynatron suggest Intel plans to offer two sub-families: higher-end AP variants similar to the Xeon 6900P and a slightly less demanding SP series, potentially with a reduced pin count.

To put this evolution in context, the current LGA7529 platform supports up to 128 performance cores, 12 channels of DDR5 memory, and power envelopes up to 500 watts. A roughly 30 percent increase in pin count should allow Diamond Rapids to expand I/O bandwidth, add memory channels, increase thermal design power, and possibly accommodate more cores. Visually, the new socket appears to be nearly five times the size of Intel's LGA1851 socket, used by Arrow Lake desktop processors. Under the hood, Diamond Rapids is expected to use the Panther Cove-X core architecture, a server-optimized counterpart to the Coyote Cove design found in Nova Lake. These CPUs are reportedly being fabricated on Intel's 18A process node, with high-volume manufacturing anticipated by late 2025 or early 2026.



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[bug]

"9,324-Pin LGA9324 Socket"? You don't say...

 

[Zendou]

"9,324-Pin LGA9324 Socket"? You don't say...

I agree, It would definitely been more interesting if the numbers did not match.

 

[SAL9000]

I wonder if there is a upper limit to how many pins a socket can have due to the complexity of manufacturing. I wonder if there is going to be some method in the future of I/O that doesn't use pins at all, perhaps optical or something else we have even dreamed of yet.

 

[bug]

I wonder if there is a upper limit to how many pins a socket can have due to the complexity of manufacturing. I wonder if there is going to be some method in the future of I/O that doesn't use pins at all, perhaps optical or something else we have even dreamed of yet.

Of course there's a limit, you can't beat physics/mechanics. I mean, what good would a 0.1mm pin be, since you can't handle it without wrecking it?
There's a lot of interconnects that don't use pins, just look at what happens inside the chip. Or inside HBM, maybe.

Something we haven't dreamed of yet is unlikely, it's all electromagnetic, whether regular current or light. And we've been dealing with those for quite a while.

 

[tommo1982]

There are so many "Cove's, Rapid's or Lake's" in the article, I don't know what it refers to anymore. I don't follow Intel's naming scheme. AMD is somewhat manageable.

 

[bug]

There are so many "Cove's, Rapid's or Lake's" in the article, I don't know what it refers to anymore. I don't follow Intel's naming scheme. AMD is somewhat manageable.

Cove is internal core design (akin to Zen), Lake is desktop SKUs and Rapids is server SKUs.

 

[Tek-Check]

There are so many "Cove's, Rapid's or Lake's" in the article, I don't know what it refers to anymore. I don't follow Intel's naming scheme. AMD is somewhat manageable.

Google it, spend time on it and you shall find out. Above all, you can ask questions here.

 

[tommo1982]

Google it, spend time on it and you shall find out. Above all, you can ask questions here.

I am. It's a mess. I prefer numerical values, like Core 5 Ultra or i9-14900. Easy to follow, even when I consider AMD's APU and 8xxx series CPU's.

 

[AntiX3DGlazer]

I am. It's a mess. I prefer numerical values, like Core 5 Ultra or i9-14900. Easy to follow, even when I consider AMD's APU and 8xxx series CPU's.

all well and good. Try and understand their mobile stack now. What is an AI 9 HX 370? What is an AI MAX+ 395? What about an 8945HX? Is that a generation newer than the 7945HX?
AMD mobile naming sucks.
Intel's does too. Tell anyone outside tech that a Core 3 210U is the exact same CPU as a core i3-1215U and they won't even begin to understand. wtf.

 

[igormp]

I am. It's a mess. I prefer numerical values, like Core 5 Ultra or i9-14900. Easy to follow, even when I consider AMD's APU and 8xxx series CPU's.

But there's still going to be a numerical value for the actual SKUs.
Diamond Rapids is the product lineup, similar to how AMD named different Epyc generations as Genoa or Turin. "Rapids" are usually the used moniker for their server offerings.
The "lake" moniker is used for desktop/consumer, similar to how AMD's Ryzen 9000 series was called Granite Ridge, or the Ryzen 7000 series was called "Raphael".
"Cove" is the moniker for the internal µarch for a given generation that's used across products, so we have something like Raptor Cove, which was used by both Raptor Lake (Core 14th gen) as well as Emerald Rapids (Xeons), similar to how Zen 4 was used by both Ryzen 7000 (Raphael) and Epyc 9004 series (Genoa).

 

[tommo1982]

all well and good. Try and understand their mobile stack now. What is an AI 9 HX 370? What is an AI MAX+ 395? What about an 8945HX? Is that a generation newer than the 7945HX?
AMD mobile naming sucks.
Intel's does too. Tell anyone outside tech that a Core 3 210U is the exact same CPU as a core i3-1215U and they won't even begin to understand. wtf.

I forgot about mobile parts perhaps AMD is easier because I read almost all articles related to their tech. I didn't read much about Intel since 14th gen. It's Raptor Lake I believe. I'm more familiar with their GPU'S, actually and thinking about A380 for my HTPC. AMD and Nvidia have nothing in this segment. My GPU Ryzen 5 Pro 3350G doesn't like 2160p and has no AV1 support.
Anyway, Intel makes a little more sense after I read some.

 

[SAL9000]

Of course there's a limit, you can't beat physics/mechanics. I mean, what good would a 0.1mm pin be, since you can't handle it without wrecking it?
There's a lot of interconnects that don't use pins, just look at what happens inside the chip. Or inside HBM, maybe.

Something we haven't dreamed of yet is unlikely, it's all electromagnetic, whether regular current or light. And we've been dealing with those for quite a while.

What will that limit be is what I'm asking, I bet someone in the past wondered if there were going to be pin counts near 5000 and that limit has been easily surpassed and the chips keep getting larger. What will the limit be and when it does happen what will be the next method of connecting a CPU or other types of processors to a motherboard (if they still exist at some point in the future). Perhaps the way we do things now will eventually become obsolete, something unexpected appears someday that disrupts this method.

 

[tommo1982]

But there's still going to be a numerical value for the actual SKUs.
Diamond Rapids is the product lineup, similar to how AMD named different Epyc generations as Genoa or Turin. "Rapids" are usually the used moniker for their server offerings.
The "lake" moniker is used for desktop/consumer, similar to how AMD's Ryzen 9000 series was called Granite Ridge, or the Ryzen 7000 series was called "Raphael".
"Cove" is the moniker for the internal µarch for a given generation that's used across products, so we have something like Raptor Cove, which was used by both Raptor Lake (Core 14th gen) as well as Emerald Rapids (Xeons), similar to how Zen 4 was used by both Ryzen 7000 (Raphael) and Epyc 9004 series (Genoa).

I'm good now. This comparison helps a lot actually. I got so confused with the code names I lost track of what it all means.

 

[jaggerwild]

Wasn’t intel supposed to do a nod shrink? This is big, maybe I’m thinking of Nvidia……(sorry if I’m off topic)!

 

[tommo1982]

Wasn’t intel supposed to do a nod shrink? This is big, maybe I’m thinking of Nvidia……(sorry if I’m off topic)!

Yes, Intel said it will release the Panther processors on 18A internal node. Those should be available at the end of 2025.

 

[Tek-Check]

I am. It's a mess. I prefer numerical values, like Core 5 Ultra or i9-14900. Easy to follow, even when I consider AMD's APU and 8xxx series CPU's.

I still haven't heard you asking any questions that would help you understand it and learn.

We haven't got any leak for SP, the smaller socket. I suppose the big socket will bring 16 channels and the small one 12 channels.

As Venice EPYCs will introduce PCIe 6.0 lanes, Diamond Rapids will have to do it too. By that time, Gen6 SSDs for data center will be ready.

It looks like both Intel and AMD will be staying with DDR5 on the next platform, which means another 3-4 years before DDR6, at least in data center. LPDDR6 will arrive sooner, both in client and in data center with ARM devices.

 

[Solaris17]

I agree, It would definitely been more interesting if the numbers did not match.

Fun fact I can tear down if you want but that is usable pins. The CPUs actually contain /MORE/ pads on the substrate, specifically around the edges but they are not used and are often covered slightly by the socket carrier (the plastic mount clip put on the CPUs ((for which there are multiple mounts depending on enterprise vs workstation socket for which the LGA is the same with the only difference generally being the chipset with certain generations))).

 

[AntiX3DGlazer]

Wasn’t intel supposed to do a nod shrink? This is big, maybe I’m thinking of Nvidia……(sorry if I’m off topic)!

DMR is a node shrink yes. Likely 18A