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Marvell Technology, Inc., a leader in data infrastructure semiconductor solutions expanded its custom technology platform with the launch of the industry's first 2 nm custom Static Random Access Memory (SRAM), designed to boost the performance of custom XPUs and devices powering cloud data centers and AI clusters. Combining advanced custom circuitry and software from Marvell with core SRAM and cutting-edge 2 nm process technology, Marvell custom SRAM delivers up to 6 gigabits of high-speed memory while significantly reducing memory power consumption and die area at comparable densities.
Custom SRAM is the latest Marvell innovation designed to enhance memory hierarchy performance within accelerated infrastructure. Marvell previously introduced its CXL technology for integration into custom silicon to add terabytes of memory and supplemental compute capacity to cloud servers and unveiled custom HBM technology that increases memory capacity by up to 33% while reducing the space and power required for dense high-bandwidth memory (HBM) stacks inside XPUs.
Delivering the highest bandwidth per square millimeter in the industry, Marvell custom SRAM enables chip designers to recover up to 15% of the total area of a 2 nm design. This recovered silicon real estate can be leveraged to integrate more compute cores, expand memory, shrink device size and cost, or achieve a tailored balance to meet specific performance power, application or TCO objectives. Built on an innovative data path and architecture, Marvell custom SRAM also consumes up to 66% less power than standard on-chip SRAM at equivalent densities, while operating at up to 3.75 GHz.
"Custom is the future of AI infrastructure. The methodologies and technologies used by hyperscalers today to develop cutting-edge custom XPUs will percolate to more customers, more classes of devices, and more applications," said Will Chu, senior vice president of Custom Cloud Solutions at Marvell. "We look forward to collaborating with our partners and customers creating the leading technology portfolio for the custom era."
"Memory remains one of the biggest challenges for AI clusters and clouds. These systems need as much memory as they can get as fast as they can," said Alan Weckel, co-founder of the 650 Group. "Marvell's holistic approach to the problem of improving memory performance at every available juncture—on the die, inside the chip package, and inside the system—is compelling and underscores the gains that become possible through customization."
A Foundation for the Custom silicon Era
Custom SRAM is the latest extension of the Marvell custom technology platform for developing chips in a post-Moore's Law world. For over 50 years, advances in semiconductor performance and power were primarily achieved through shrinking the size of transistors. With the costs and challenges of transistor scaling increasing dramatically, semiconductor companies and their customers are customizing silicon to better serve a customer's unique infrastructure architecture, experimenting with new chip and packaging breakthroughs, and rethinking assumptions about chip design to extend the boundaries of computing.
Marvell Custom Platform Strategy
The Marvell custom platform strategy seeks to deliver breakthrough results through unique semiconductor designs and innovative approaches. By combining expertise in system and semiconductor design, advanced process manufacturing, and a comprehensive portfolio of semiconductor platform solutions and IP—including electrical and optical serializer/deserializers (SerDes), die-to-die interconnects for 2D and 3D devices, silicon photonics, co-packaged copper, custom HBM, system-on-chip (SoC) fabrics, optical IO, and compute fabric interfaces such as PCIe Gen 7—Marvell is able to create platforms in collaboration with customers that transform infrastructure performance, efficiency and value.
View at TechPowerUp Main Site
Custom SRAM is the latest Marvell innovation designed to enhance memory hierarchy performance within accelerated infrastructure. Marvell previously introduced its CXL technology for integration into custom silicon to add terabytes of memory and supplemental compute capacity to cloud servers and unveiled custom HBM technology that increases memory capacity by up to 33% while reducing the space and power required for dense high-bandwidth memory (HBM) stacks inside XPUs.
Delivering the highest bandwidth per square millimeter in the industry, Marvell custom SRAM enables chip designers to recover up to 15% of the total area of a 2 nm design. This recovered silicon real estate can be leveraged to integrate more compute cores, expand memory, shrink device size and cost, or achieve a tailored balance to meet specific performance power, application or TCO objectives. Built on an innovative data path and architecture, Marvell custom SRAM also consumes up to 66% less power than standard on-chip SRAM at equivalent densities, while operating at up to 3.75 GHz.
"Custom is the future of AI infrastructure. The methodologies and technologies used by hyperscalers today to develop cutting-edge custom XPUs will percolate to more customers, more classes of devices, and more applications," said Will Chu, senior vice president of Custom Cloud Solutions at Marvell. "We look forward to collaborating with our partners and customers creating the leading technology portfolio for the custom era."
"Memory remains one of the biggest challenges for AI clusters and clouds. These systems need as much memory as they can get as fast as they can," said Alan Weckel, co-founder of the 650 Group. "Marvell's holistic approach to the problem of improving memory performance at every available juncture—on the die, inside the chip package, and inside the system—is compelling and underscores the gains that become possible through customization."
A Foundation for the Custom silicon Era
Custom SRAM is the latest extension of the Marvell custom technology platform for developing chips in a post-Moore's Law world. For over 50 years, advances in semiconductor performance and power were primarily achieved through shrinking the size of transistors. With the costs and challenges of transistor scaling increasing dramatically, semiconductor companies and their customers are customizing silicon to better serve a customer's unique infrastructure architecture, experimenting with new chip and packaging breakthroughs, and rethinking assumptions about chip design to extend the boundaries of computing.
Marvell Custom Platform Strategy
The Marvell custom platform strategy seeks to deliver breakthrough results through unique semiconductor designs and innovative approaches. By combining expertise in system and semiconductor design, advanced process manufacturing, and a comprehensive portfolio of semiconductor platform solutions and IP—including electrical and optical serializer/deserializers (SerDes), die-to-die interconnects for 2D and 3D devices, silicon photonics, co-packaged copper, custom HBM, system-on-chip (SoC) fabrics, optical IO, and compute fabric interfaces such as PCIe Gen 7—Marvell is able to create platforms in collaboration with customers that transform infrastructure performance, efficiency and value.
View at TechPowerUp Main Site
