ATI's Radeon 4000!

[largon]

ROPs aren't really a bottleneck on modern GPUs.
Grab a calculator and type in "12 000 000 000" (12 GPixels) which is the number what HD3870's ROPs output / second. Start calculating what that amount of pixels equals @ a given res/FPS.

ATi needs more TMUs (16 is very low compared to competition) and shader (for AA performance as R6-gen uses shaders for AA).

 

[Tatty_Two]

ROPs aren't really a bottleneck on modern GPUs.
Grab a calculator and type in "12 000 000 000" (12 GPixels) which is the number what HD3870's ROPs output / second. Start calculating what that amount of pixels equals @ a given res/FPS.

ATi needs more TMUs (16 is very low compared to competition) and shader (for AA performance as R6-gen uses shaders for AA).

I am surprised you have said that, dont the ROP's move the data from the SP's through the memory bus and into the TMU's? (maybe I have that bit wrong) BUT.....The ROP's are the key ingredient in the Anti Aliasing Process, one of the reasons ATI is generally poorer than NVidia at this is because it has so many SP's with so few ROP's, now maybe that is not "bottlenecking"....perhaps just a flaw in architecture IDK but the ROP's with high detail/AA enabled are IMO the key to the rendering power of the card.

Edit: You mention ATi's TMU count is very low in relation to the competition.....doesent the 8800GT have just 16? which is kind of my point, because if the number of SP's is manageable then the ROP and TMU count is less important, TMU's have a relationship with the memory bus, when you go down to 256bit (from 512) your TMU's reduce so 256bit is always going to have less TMU's, the only way ATi could increase them is by moving once again to 512bit which for them means a 12 layer PCB I beleive, an aweful lot more in production costs and again less competative even in the pricing.

 

[largon]

Tatty_One,
Note that ATi R600 and it's descendants (RV6_0, etc.) support only software anti-aliasing (requirement for DX10.1, btw) which means SPs handle all things AA. G80/G92 OTOH have a little bit more complex (= conventional) ROPs that have dedicated hardware meant to perform AA instead of "outsourcing" it to the SPs. More ROPs on G80/G92 automatically equals to better AA performance, but for ATi R6-gen it's the amount of shader processors that dictate AA performance.

ROP as in "raster operator" - or "render backend" for ATi - is the final stage of rendering: ROP basically sums up the calculations SPs/TMUs come up with - ROPs infact draw the pixels that you see on your monitor.

 

[Tatty_Two]

Tatty_One,
Note that ATi R600 and it's descendants (RV6_0, etc.) support only software anti-aliasing (requirement for DX10.1, btw) which means SPs handle all things AA. G80/G92 OTOH have a little bit more complex (= conventional) ROPs that have dedicated hardware meant to perform AA instead of "outsourcing" it to the SPs. More ROPs on G80/G92 automatically equals to better AA performance, but for ATi R6-gen it's the amount of shader processors that dictate AA performance.

ROP as in "raster operator" - or "render backend" for ATi - is the final stage of rendering: ROP basically sums up the calculations SPs/TMUs come up with - ROPs infact draw the pixels that you see on your monitor.

Check my edit above, added a bit!

 

[largon]

ATi's TMU count is very low in relation to the competition.....doesent the 8800GT have just 16

R600 and RV670 both have 16 TMUs. G92 has 28 TMUs that can do 2 ops/clk/unit hence the whopping 36.4GTexels/s texture fillrate @ 650MHz, compare that to R600/RV670 with 16 TMUs chugging out 12.5GTexels/s @ 775MHz.

TMU's have a relationship with the memory bus, when you go down to 256bit (from 512) your TMU's reduce so 256bit is always going to have less TMU's, the only way ATi could increase them is by moving once again to 512bit

TMUs don't have any relationship with memory bus width. I believe you're thinking about G80 (and G92) in which each ROP-quad has it's own 64bit RAM channel (6× ROP-quads on G80GTX = 384bit). No such coupling exists on ATi R6-family GPUs.

 

[Xazax]

What i get lost in is why ATI incorperated DX10.1 and nvidia's 9 series still wont, also considering the 8800GS is based on the G92 core which has more ROPS'/TAU's do you think it would be possible to unlock these?

And one last question for comparisons sake how many TMU's/TAU's did the 7900/1900 series have?

 

[Tatty_Two]

R600 and RV670 both have 16 TMUs. G92 has 28 TMUs that can do 2 ops/clk/unit hence the whopping 36.4GTexels/s texture fillrate @ 650MHz, compare that to R600/RV670 with 16 TMUs chugging out 12.5GTexels/s @ 775MHz. TMUs don't have any relationship with memory bus width. I believe you're thinking about G80 (and G92) in which each ROP-quad has it's own 64bit RAM channel (6× ROP-quads on G80GTX = 384bit). No such coupling exists on ATi R6-family GPUs.

Thanks, that cleared some things that have been bugging me for a while now!

 

[Tatty_Two]

What i get lost in is why ATI incorperated DX10.1 and nvidia's 9 series still wont, also considering the 8800GS is based on the G92 core which has more ROPS'/TAU's do you think it would be possible to unlock these?

And one last question for comparisons sake how many TMU's/TAU's did the 7900/1900 series have?

You cant unlock something that has been laser cut for instance, gone are the days where manufacturers just "disabled" some pixel piplelines, now they destroy them.....otherwise they lose too much money, if you could enable all the SP's in the 8800GT by a BIOS flash, who would buy the GTS???

 

[tkpenalty]

I have to say that chart seems really faked... however it would be awesome if it was true. 1 flop per core... wow.

But one thing which completely rips the authenticity of this apart is: "RV770".

First off, RV770, in logic the top of the line should be called R700 or R780 (unlikely), going by the older naming schemes, the V is added generally to indicate a REVISION of the product. There is no logic behind naming the next generation cards with the RV prefix. Example: R580 became RV570, with the die shrunken X1950PRO/X1650XT from the X1900XTX, and more recently, R600 HD2900XT > RV670 die shrunken HD3870.

Nuff said. An obvious hoax.

I'd say AMD would be developing a 45nm GPU core instead of 55nm, it would be most economical at this point since nvidia are slacking off.

EDIT: I wouldnt even take a grain of salt from this article. Just a guy and his fantasies-anyone can make this stuff up.

 

[largon]

tkpenalty,
"V" in "RV" stands for value, nothing else.
...RV515, RV530, RV570, RV610, RV630... and so on.

G92 has 28 TMUs that can do 2 ops/clk/unit hence the whopping 36.4GTexels/s texture fillrate @ 650MHz, compare that to R600/RV670 with 16 TMUs chugging out 12.5GTexels/s @ 775MHz. (...)

I hereby quote myself to make a correction:

G92 has 8 SP partitions and each has their own dedicated TMU-cluster. In each cluster there are 8 TAUs and 8 TFUs. What I'm saying is since G92GT has 1 SP partition disabled it has 56 (7×8) TAUs and GTS with the full 8 SP partitions has 64 (8×8) TAUs.

Hmm... GPU-Z calculates texture fillrates as if both G92GT and G92GTS had only 56 TAUs.