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The more cores a CPU has, the more cache memory it needs, since increasing the number of cores increases the "competition" between the cores for access to RAM. And with a larger amount of cache, more data is copied in advance from RAM to cache and read directly from it by the cores, thus preventing cores from idling (and consequently losing performance) due to delays in accessing data in main RAM.
With the EPYC 9965 CPU (192 cores), AMD did exactly the opposite of what logic suggests: it greatly increased the number of cores and halved the amount of L3 cache memory.
It seems that, in the video encoding test of the link below (done by Tom's Hardware), exactly what was described above happened: the EPYC 9965 CPU (192 cores) had a poor performance, similar to the EPYC 9575F CPU, which has only 64 cores.
And on the EPYC CPU specifications pages, AMD did the "favor" of not showing which type of core the processor has (whether ZEN5, ZEN5c, etc.), nor does it show which instruction sets the processor supports or how much cache memory each CPU/chiplet has:
Source:
www.tomshardware.com
With the EPYC 9965 CPU (192 cores), AMD did exactly the opposite of what logic suggests: it greatly increased the number of cores and halved the amount of L3 cache memory.
It seems that, in the video encoding test of the link below (done by Tom's Hardware), exactly what was described above happened: the EPYC 9965 CPU (192 cores) had a poor performance, similar to the EPYC 9575F CPU, which has only 64 cores.
And on the EPYC CPU specifications pages, AMD did the "favor" of not showing which type of core the processor has (whether ZEN5, ZEN5c, etc.), nor does it show which instruction sets the processor supports or how much cache memory each CPU/chiplet has:

Source:

AMD EPYC ‘Turin’ 9005 Series - we benchmark 192-core Zen 5 chip with 500W TDP
Cranking up the power.