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European Supercomputer Chip SiPearl Rhea Delayed, But Upgraded with More Cores

AleksandarK

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The rollout of SiPearl's much-anticipated Rhea processor for European supercomputers has been pushed back by a year to 2025, but the delay comes with a silver lining - a significant upgrade in core count and potential performance. Originally slated to arrive in 2024 with 72 cores, the homegrown high-performance chip will now pack 80 cores when it eventually launches. This decisive move by SiPearl and its partners is a strategic choice to ensure the utmost quality and capabilities for the flagship European processor. The additional 12 months will allow the engineering teams to further refine the chip's architecture, carry out extensive testing, and optimize software stacks to take full advantage of Rhea's computing power. Now called the Rhea1, the chip is a crucial component of the European Processor Initiative's mission to develop domestic high-performance computing technologies and reduce reliance on foreign processors. Supercomputer-scale simulations spanning climate science, drug discovery, energy research and more all require astonishing amounts of raw compute grunt.

By scaling up to 80 cores based on the latest Arm Neoverse V1, Rhea1 aims to go toe-to-toe with the world's most powerful processors optimized for supercomputing workloads. The SiPearl wants to utilize TSCM's N6 manufacturing process. The CPU will have 256-bit DDR5 memory connections, 104 PCIe 5.0 lanes, and four stacks of HBM2E memory. The roadmap shift also provides more time for the expansive European supercomputing ecosystem to prepare robust software stacks tailored for the upgraded Rhea silicon. Ensuring a smooth deployment with existing models and enabling future breakthroughs are top priorities. While the delay is a setback for SiPearl's launch schedule, the substantial upgrade could pay significant dividends for Europe's ambitions to join the elite ranks of worldwide supercomputer power. All eyes will be on Rhea's delivery in 2025, mainly from Europe's governments, which are funding the project.



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Will now unsignificant. Numbers talked more than advertised speaking.
72 to 80 is ~11%
Sorry just trying my math.

Stay positive man, we should support this! You are European too!... :D
 
Stay positive man, we should support this! You are European too!... :D
I am always positive and radiant. Here, I managed to find something that is positive. I am happy with the number of PCIe 5.0 lanes.
 
I am happy with the number of PCIe 5.0 lanes.
Not that the consumer will ever use these chips though, since they are meant for super computers... But ok..
 
Not that the consumer will ever use these chips though, since they are meant for super computers... But ok..
Yes, but I wonder why only 256 bit width to RAM. Intel has 512 bit, AMD from ZEN 4 Epyc 768 bit (12 channels) if I'm not wrong.
 
They probably ran Crysis on 72 cores and got a measly 54 FPS.

Then it all makes sense
 
TSCM's N6
HBM2E
256-bit DDR5

These are very weak specifications for a current (or future) HPC CPU.
 
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