How are PCI-E lanes controlled? IOU12

[davidm71]

Hi,

Trying to understand how Pci Express lanes in lets say a 6850k processor are allocated and controlled. As I understand you have four controllers inside the cpu that manage the lane allocation. IOU 0-3 controlling 1 4X, 1 8X, and 2 16X lane pairs. Looking into my bios with Amibcp I have also noticed there are four IIO divisions that control their own set of IOU’s so I’m a little confused about how its all designed if someone could help explain this all?


Thanks

 

[EarthDog]

Your mobo manual shows the lane breakdowns and dependencies by processor.

What, exactly do you want to know???

 

[Flaky]

What exactly do you want to know?
There are some details in intel's specsheet HERE (1.3.2)

 

[davidm71]

Specifically how the IOU lanes are allocated to physical PCI-E Slots and how its controlled on the processor level.

Thanks for the link.

Haven’t been able to download PDFs from Intel all day! Intel site must be down?!

 

[EarthDog]

Im mobile, but look up chipset diagram to see the breakdown.

 

[davidm71]

I've been studying it for last few days. This is what I was able to discern. Basically you have four Integrated IO controllers controlling various functions. Intel only details three but there are four. Each one has a setting for setting device 1 bifurcation mode though the first IIO I got better results setting its bits on through IntelSetup. There are also four pairs of PCI-E lanes that have there own device number such as Device 0 to Device 3. Device 0 is the DMI, Device 1 is the 8X channel, Device 2 + 3 are the 16X channels. The IIO's are identified as Device 5. Gets pretty confusing.

 

[eidairaman1]

Honestly unless you are having resource conflicts or irq conflicts, its easiest to leave them default unless if you can contact the cpu/chipset/mobo engineers.

There are some things we aren't to know.

@cdawall what's your take?

 

[davidm71]

Well knowing is believing because I was able to add an option in my bios to bifurcate the last lane. I even verified that the right registers where being altered. Tested results in Hwinfo64. Now waiting for my two port adapter to come in mail and give it a proper test.