How does Xeon Phi get 4 threads per core?

[Indigox_]

I was looking through the CPU database today and found Xeon Phi's to seemingly have four threads per core, how does that work? As far as I know, HT only goes up to 2 threads.

 

[dragontamer5788]

Same way as POWER9's implementation of hyperthreading goes up to 8 threads per core. They changed the hardware to support more threads.

Dunno how else to say it. Why does a gearbox have 5 gears when the last version had 4 gears and some other car has 6 gears? Well... because there's 5 gears in this gearbox.

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NVidia supports like 8 warps per SM or something like that, and AMD Vega supports like 32 wavefronts per CU. Etc. etc. All these numbers are arbitrary, 2 threads per core, 4-threads, 8-threads, or more and more. Its whatever the computer designer thought might be best.

 

[AnotherReader]

I was looking through the CPU database today and found Xeon Phi's to seemingly have four threads per core, how does that work? As far as I know, HT only goes up to 2 threads.

No, simultaneous multi-threading or hyper threading in the Intel parlance, can go beyond two threads. For our common chips, 2 threads are reasonable as these CPUs are focused on minimizing latency. If you can afford to sacrifice latency for throughput, then increasing the number of simultaneously executing threads is the way to go. Power 8 can execute 8 threads simultaneously. For Knights Landing, SMT improves performance in many workloads as Chips and Cheese found out. I would recommend reading the entire article.

 

[Shrek]

I always thought that more than two threads made no sense; the first thread might occupy the core to say 75% and the second thread a good part of the remaining 25%, so I never saw the logic in further threads.

 

[AnotherReader]

I always thought that more than two threads made no sense; the first thread might occupy the core to say 75% and the second thread a good part of the remaining 25%, so I never saw the logic in further threads.

It depends upon what the machine is expected to run. A lot of commercial applications have low ILP; even the widest CPU may struggle to get more than 0.5 IPC for these workloads. For such tasks, increasing the number of threads is an excellent way to increase throughput while keeping die size In check compared to adding more cores.

 

[dragontamer5788]

I always thought that more than two threads made no sense; the first thread might occupy the core to say 75% and the second thread a good part of the remaining 25%, so I never saw the logic in further threads.

It depends on the workload, and the architecture.

If the first thread is 100% memory operations, then it actually uses like 1%, maybe 0.5% of the core, as memory operations are 99%+ waiting for DDR4 and/or DDR5 to execute. While one thread is all memory, the 2nd thread could be CPU-heavy AVX instructions, which would use up 100% of the core.

So the split in practice is Thread#1 is 1% and Thread#2 is 99%.

Later, when Thread#2 becomes memory heavy (usually code reads/writes to memory, then computes, then reads/writes to memory later), Thread#1 becomes compute-heavy. So then it switches to 99% Thread#1 and 1% Thread#2.

All the while, neither Thread#1 nor Thread#2 experience any slowdown. You see, they would have been "waiting for memory anyway" and sitting idle.

 

[Indigox_]

No, simultaneous multi-threading or hyper threading in the Intel parlance, can go beyond two threads. For our common chips, 2 threads are reasonable as these CPUs are focused on minimizing latency. If you can afford to sacrifice latency for throughput, then increasing the number of simultaneously executing threads is the way to go. Power 8 can execute 8 threads simultaneously. For Knights Landing, SMT improves performance in many workloads as Chips and Cheese found out. I would recommend reading the entire article.

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Oh, I didn't know that. Always thought only 2 threads per core was possible with HT, guess I learned something new today