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how to improve g.skill ddr5 6400 cl32 latency

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Jan 5, 2021
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hello everyone i have asus z690 hero i9 13900k and 2x16gb g.skill ddr5 6400 cl32

i overclock the memory to 6800MHZ when i overclock to 6933 i get memtest eror when i overclock to 7000MHZ no boot

so i want to squeeze the memory in 6800MHZ to max preformance and to lower latency as lowe as possible what i need to change in the memory subtimings to lower latency
 

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Check CPUz to see if it's Hynix or Samsung IC. Most likely Hynix and that would be M-Die. Either way your limits for that memory will be 6933 unless you put in 1.6v+. I don't suggest that for daily.

Report back and I'll you some timings you can try.

Edit: have you already changed the sub-timimgs or is that the MB auto configuration?
 
Hi,
What is latency at 6400 ?
ATM read/ write/ copy aren't all that far apart but tightening these three should lower latency number how that happens you just have to play with numbers.
Frankly I've never had anything good happen with cke or anything else set at 4, 6-7 yeah
Rfc you might lower this until it won't boot and raise it until it does and add 10-20 more.
 
Check CPUz to see if it's Hynix or Samsung IC. Most likely Hynix and that would be M-Die. Either way your limits for that memory will be 6933 unless you put in 1.6v+. I don't suggest that for daily.

Report back and I'll you some timings you can try.

Edit: have you already changed the sub-timimgs or is that the MB auto configuration?
yes i changed the sub-timimgs

Hi,
What is latency at 6400 ?
ATM read/ write/ copy aren't all that far apart but tightening these three should lower latency number how that happens you just have to play with numbers.
Frankly I've never had anything good happen with cke or anything else set at 4, 6-7 yeah
Rfc you might lower this until it won't boot and raise it until it does and add 10-20 more.
what i need to lower?
 

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yes i changed the sub-timimgs
Have you run any memory stability tests like TM5? tRRD_sg and tRRD_dg are way to low. Surprised it hasn't frozen on you. tRDRD_sg and tRDRD_dg are a bit low as well. tWRWR_dg maybe okay at 7. Probably 8 is more likely. tFAW more likely stable at 25.

Lastly your tREFI is maxed out. I know it will artificially lower your latency, but whats most misunderstood is how the longer your delay the cell refresh the more likely to have errors. As the memory warms up these errors are more common. With a fan directly on the memory, you probably could do 66,000-98,000.
 
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