Micron E die 4000mhz timings - 5700x PBO suggestions

[izy]

Ok , so ive upgraded 2 3 weeks ago my ryzen system from 3700x to 5700x and now i have time to tweak it a bit.

My OC so far = PBO + AutoOC 200 - PPT 135 , TDC 85, EDC 120. curve negative 30, scalar auto.
Seems to boost 4650 - 4700 in CB all core and 4850 single core on all cores. (cpu-z reports 4748.89 MHz on validation page) , hwinfo shows that all cores can do 4850.
Before RAM OC: CB R23 All core 16150 , cpu-z 6950 / 666.
Temps seem to sit ~75C in CB R23

Some weird thing happened after i changed the CPU on last BETA version of BIOS ( ive updated it now ) , i had no curve optimizer in BIOS but i could change the AutoOC value to 400 , now (after update) its 200 as it should had been and i think i saw some 4950 boost with the BETA and autoOC 400 (not sure).

My question is what timings i should touch (first) at 4000mhz for zen 3 so i wont mess around too much and waste a lot of time, with my current settings (ill post pictures below) everything seems stable so far (1 full run of TM5 - Extreme1@anta777 , few CB23 runs) - ill also post a pic with my old timings on 3700x .
Edit: i only have 2 sticks of ram connected at the moment but ill add tomorrow the other 2, i want to see how high i can get with only 2 sticks.

 

[ir_cow]

Before changing more settings, make sure what you have is stable and save the BIOS profile. This will save a lot of headaches I promise!

 

[izy]

Before changing more settings, make sure what you have is stable and save the BIOS profile. This will save a lot of headaches I promise!

Yes , ofc.

 

[The King]

I posted some profiles here most of the timings should work for 4000MT. If I recall correctly C9BLM IC dont do 4000MT with RCDRD 18 you would need 19.
I ran 1.5V in some of those tests but you would only need 1.45V to 1.46V to be stable.

Share your AIDA 64 cache and memory benchmark here

This is another Micron Kit I have Crucial Ballistix 3600 CL 16-18-18-38-58 (C9BLM) 16GB DR Micron Rev. E Running ar 4133 CL16-19-19-44-63 1:1:1. Left CCD on Auto it will only boot with 1.2 CCD. This passes at least 5 cycles of TM5 1usmus. I see you are above 2K.. very nice. I am on the fence...

www.techpowerup.com

 

[izy]

I posted some profiles here most of the timings should work for 4000MT. If I recall correctly C9BLM IC dont do 4000MT with RCDRD 18 you would need 19.

Share your AIDA 64 cache and memory benchmark here

This is another Micron Kit I have Crucial Ballistix 3600 CL 16-18-18-38-58 (C9BLM) 16GB DR Micron Rev. E Running ar 4133 CL16-19-19-44-63 1:1:1. Left CCD on Auto it will only boot with 1.2 CCD. This passes at least 5 cycles of TM5 1usmus. I see you are above 2K.. very nice. I am on the fence...

www.techpowerup.com

Ill check it out , thanks, as you can see in the pictures it does so far, no errors in TM5 but i havent touched the secondary timings yet

EDIT: IBT benchmark

 

[The King]

Ill check it out , thanks, as you can see in the pictures it does so far, no errors in TM5 but i havent touched the secondary timings yet

Are you using the 1usmus V3 profile? the standard "Serj" settings does not work good at all for detecting memory errors.
to make sure your ram is 100% stable you need to run 25 cycles. LIke this also a good idea to have HWINFO open during the test to check for WHEA errors while the test is running.

 

[izy]

Are you using the 1usmus V3 profile? the standard "Serj" settings does really work good at all for detecting memory errors.
to make sure your ram is 100% stable you need to run 25 cycles. LIke this also a good idea to have HWINFO open during the test to check for WHEA errors while the test is running.
View attachment 269308

Good point , seems that i have some WHEA errors , ill test with 16 19 19 19
I am using the Extreme1@anta777 profile in TM5.

 

[The King]

Good point , seems that i have some WHEA errors , ill test with 16 19 19 19
I am using the Extreme1@anta777 profile in TM5.

The good thing about the 1usmus profile is that the error codes can be checked up and timings / settings can be adjusted based on those errors.
not sure if they apply to anta777 but its apparently a good test as well.

tRFC mini DDR4/DDR5 WIP

TM5 Error Description Cheatsheet,1usmus_V3 TM5 Errors Decyphered,SOURCE 1usmus_V3,Error Type,Error Description ERROR #0,RefreshStable 0Mb,Voltage cutoff choke, suspect tRRD & tWTR Nearly always tRRD & tWTR but can also be too low tRP or tiny bit too low tRC (if user used > -3 on tRC) Start by ...

docs.google.com

Edited.
My advice is to tune 3800 CL14 FCLK 1900 with RCDRD 17/18 with +/- 1.45V. It should the sweet spot and save you a lot of time.
Different RAM but same C9BLM ICs. If you can get this to run then it should be fine for daily. Test with anta777 or 1usmus_V3.

 

[izy]

The good thing about the 1usmus profile is that the error codes can be checked up and timings / settings can be adjusted based on those errors.
not sure if they apply to anta777 but its apparently a good test as well.

tRFC mini DDR4/DDR5 WIP

TM5 Error Description Cheatsheet,1usmus_V3 TM5 Errors Decyphered,SOURCE 1usmus_V3,Error Type,Error Description ERROR #0,RefreshStable 0Mb,Voltage cutoff choke, suspect tRRD & tWTR Nearly always tRRD & tWTR but can also be too low tRP or tiny bit too low tRC (if user used > -3 on tRC) Start by ...

docs.google.com

Edited.
My advice is to tune 3800 CL14 FCLK 1900 with RCDRD 17/18 with +/- 1.45V. It should the sweetspot and save you alot of time.
Different RAM but same C9BLM ICs. If you can get this to run then it should be fine for daily
View attachment 269314

I just tested GMD on/off , cl 16 18 - 19 19 19 ,20 20 20, 22 22 22, less Whea but still WHEA, i guess it cant handle 4000mhz , is it the CPU or the RAM?
Ill try this settings , i was just playing a bit @ 4k but it seems a no go.

If i remember right i had a problem like this with some other RAM kit (but at 3722 or something , other CPU) and it got fixed by playing with ProcODT , not sure if it will do anything , but ill give it a try before going to 3800.

Edit2: Seems that the highest i can go without WHEA errors is 1933Mhz, i guess the RAM cant handle more.
I am going to try your settings @The King

 

[The King]

The good thing about the 1usmus profile is that the error codes can be checked up and timings / settings can be adjusted based on those errors.
not sure if they apply to anta777 but its apparently a good test as well.

tRFC mini DDR4/DDR5 WIP

TM5 Error Description Cheatsheet,1usmus_V3 TM5 Errors Decyphered,SOURCE 1usmus_V3,Error Type,Error Description ERROR #0,RefreshStable 0Mb,Voltage cutoff choke, suspect tRRD & tWTR Nearly always tRRD & tWTR but can also be too low tRP or tiny bit too low tRC (if user used > -3 on tRC) Start by ...

docs.google.com

Edited.
My advice is to tune 3800 CL14 FCLK 1900 with RCDRD 17/18 with +/- 1.45V. It should the sweet spot and save you a lot of time.
Different RAM but same C9BLM ICs. If you can get this to run then it should be fine for daily. Test with anta777 or 1usmus_V3.
View attachment 269314

Was posting at 1am local time so posted Micron Rev B by mistake. But timings may still work.
For 4 DIMMS you can try these settings. These are 4 X C9BLM Micron Rev. E DIMMS. Same timings can be used with FCLK 1933 on your board.
IF you get 3800 CL14 stable then that should be less headache but if you want to get the max out then you can try these settings.

 

[izy]

Was posting at 1am local time so posted Micron Rev B by mistake. But timings may still work.
For 4 DIMMS you can try these settings. These are 4 X C9BLM Micron Rev. E DIMMS. Same timings can be used with FCLK 1933 on your board.
IF you get 3800 CL14 stable then that should be less headache but if you want to get the max out then you can try these settings.
View attachment 269364

Thanks man , but i think i am in bad luck , with FLK 1900+ i just get WHEA errors and its not the RAM as i tested with default ram speed ( 2666 ) and only FLK 1900 / 2000. It seems to work perfect even with WHEA errors at those speeds (did some benchmarks , tested some games etc.. ) but i dont like having those errors , i think i need to play with VDDG / SOC to get rid of WHEA on 1900+. After some google searches i saw that many people are getting WHEA errors on Zen 3 at 1900mhz+ (and the system is stable) so i left it on 3733MHZ at the moment (no WHEA).

Edit: This computer is so weird , i did a full bios reset (removed the battery) , then i went for 1933 , PBO ON but NO AutoOC and NO curve optimizer and i passed TM5 1usmus_v3 but max clock is at 4650Mhz now. I am going to try and see if it can go 2000 but at the moment im thinking that AutoOC or the curve optimizer had something to do with the WHEA errors at 1900Mhz+ (or maybe the BIOS reset did the magic? prob not ) . With the settings from before at 1900Mhz+ (included 1900) i tried everything , changed all the voltages , different timings , settings and nothing , after 15 - 20 sec of TM5 it was spitting WHEA errors. (settings that passed TM5 in second pic, DRAM at 1.35v what? )

 

[The King]

3733 looks promising try RRDS 4 RRDL 6. tFAW should ideally be RRDS X 4 so that is how you see most run tFAW 16. If RRDS is 5 then tFAW should be 20
Both SCLs can also be changed from 5s to 4s.

The RAM ICs without tuned subs timings can do 4000/4400 with just 1.35V so that is normal for these Micron DIMMS.

 

[izy]

3733 looks promising try RRDS 4 RRDL 6. tFAW should ideally be RRDS X 4 so that is how you see most run tFAW 16. If RRDS is 5 then tFAW should be 20
Both SCLs can also be changed from 5s to 4s.

The RAM ICs without tuned subs timings can do 4000/4400 with just 1.35V so that is normal for these Micron DIMMS.

Seems that i have a memory hole at 1900Mhz or higher (but not at 1933Mhz).
I tested even on my 3700x (and RAM at 3600Mhz+) to go lower RRDS , RRDL on this kit but TM5 always spitting errors even with 1.45v

I did 2 - 3 tests @1900Mhz changing voltages to some random values , but always WHEA errors , when ill have time ill try to play more with those and change the values to something that could work and not just random (if anyone has any ideas what those values could be)

I went back to PBO + AutoOC 200 - PPT 135 , TDC 85, EDC 125. curve negative 25 (was 30) , scalar auto.
And RAM / FCLK 1933Mhz - 16 18 19 18 38 , having tRCDRD to 18 caused couple of errors in TM5 , maybe it will work if i go with 1.45v (only tested with 1.42), i was just searching for something stable.
For now i want to tweak the RAM timings some more if possible and im starting from here (see the image , everything seems stable, my goal is to achieve ~55ns or lower ^_^ ).

 

[The King]

Weird behavior. I have 6 kits with C9BLM ICs all do RRDS 4 RRDL 4 no problems
Your RCDRD is up to 19 now?

Some improvements to try when running CL16 RDWR should be 8.

GDM disable you can change RTP from 8 to 7.
If it gives you errors then run tWR16 and RTP 8

*Important change tCWL to 16 it should not be at 14 do this first change before changing RDWR to 8

 

[izy]

Weird behavior. I have 6 kits with C9BLM ICs all do RRDS 4 RRDL 4 no problems
Your RCDRD is up to 19 now?

Some improvements to try when running CL16 RDWR should be 8.

GDM disable you can change RTP from 8 to 7.
If it gives you errors then run tWR16 and RTP 8

*Important change tCWL to 16 it should not be at 14 do this first change before changing RDWR to 8

I just went 15 17 19 17 35 58, 55.4ns , tRDWR 10 (on auto), i will try you suggestions.
Edit: and thanks for your time

tCWL to 16 it should not be at 14 do this first change before changing RDWR to 8 (should i try this with my new settings at CL 15? )

 

[The King]

I just went 15 17 19 17 35 58, 55.4ns , tRDWR 10 (on auto), i will try you suggestions.
Edit: and thanks for your time

tCWL to 16 it should not be at 14 do this first change before changing RDWR to 8 (should i try this with my new settings at CL 15? )

No if CL 14 or 15 then tCWL can be 14. you should be able to run RDWR at 9 in these cases.


When running CL16 for better stability its best to also run tCWL at 16.

 

[izy]

No if CL 14 or 15 then tCWL can be 14. you should be able to run RDWR at 9 in these cases.


When running CL16 for better stability its best to also run tCWL at 16.

I ended up with this for now , i did only 1 pass of TM5 and seems stable, thanks for help.

Edit: RDWR at 9 TM5 errors second cycle and IBT fail , i changed to 10 and everything is fine , ill change the images with my current settings.

PBO + AutoOC 200 - PPT 135 , TDC 85, EDC 125. curve negative 26, scalar auto. (max temp in cinebench loop 75-77)
Cinebench R23 - 16000, CPU-Z 663 single / ~ 6900 Multi, passed intel burn test maximum and full TM5 1usmus_v3.
I will see what will happen with 4 sticks, pretty happy with this so far.

Edit2: I think someone should mod the tomahawk bios (other BIOS too, if possible) to exploit the AutoOC bug , you can get a max of 400mhz instead of 200mhz on 5700x, (what i noticed on BETA bios after i changed the CPU without a full bios reset) with the bug a 5700x can be a 5800x that runs cooler I was boosting 4950 with PBO + AutoOC 400 ( no other settings changed at that point ) but curve optimizer only worked in Ryzen Master (still limited to 200MHZ in RM) , it was missing in BIOS, still nice to see higher clocks for who is interested of that.

 

[The King]

Both SCLs should not give any issues when at 4 and may boost some of those AIDA64 numbers slightly.

You may have forgotten to set tWR because its at 26, you can use 16 instead.

Lastly RDWR 9 can improve things but if you have issues then 10 is ok.

Did you set ProcODT to 32 or is that on AUTO ? If Auto then no problem.
You only need to change ProcODT when you have issues else its best left on AUTO.

 

[izy]

Both SCLs should not give any issues when at 4 and may boost some of those AIDA64 numbers slightly.

You may have forgotten to set tWR because its at 26, you can use 16 instead.

Lastly RDWR 9 can improve things but if you have issues then 10 is ok.

Did you set ProcODT to 32 or is that on AUTO ? If Auto then no problem.
You only need to change ProcODT when you have issues else its best left on AUTO.

Yes, ProcODT is on AUTO.
The best that i could get error free and stable is 3733Mhz, full TM5 run and some other stress tests. (from the img)

1933 FCLK worked great after some tweaking but i was still getting WHEA errors in SSE stress test with OCCT (AVX or other benchmarks without WHEA for some reason), tested with a different RAM kit and with RAM at default/XMP speeds, CPU with PBO / curve disabled , played with all the voltage settings but i couldnt get rid of WHEAs in SSE stress test. I guess thats the limit for this CPU or motherboard.

 

[The King]

Performance is great for 3733 CL14 good job.
I suggest you run it like this for some time.

I am running 2 X B450 Mortar Max so very similar to your board. It should be capable of much more I would think.
If you want to try to get rid of the WHEAs later on then start with VSOC at 1.15V and IOD 1.05V. Both those voltages are important adjusting only 1 may not help.
This should help stop the WHEA errors but those settings can vary from mobo to mobo if not your current settings are great increase from stock/XMP.

Just one change that you can make drop your CLDO VDDP to 0.9V or 0.95V. It does not need to be at 1.09V which auto sets too high.

 

[izy]

Performance is great for 3733 CL14 good job.
I suggest you run it like this for some time.

I am running 2 X B450 Mortar Max so very similar to your board. It should be capable of much more I would think.
If you want to try to get rid of the WHEAs later on then start with VSOC at 1.15V and IOD 1.05V. Both those voltages are important adjusting only 1 may not help.
This should help stop the WHEA errors but those settings can vary from mobo to mobo if not your current settings are great increase from stock/XMP.

Just one change that you can make drop your CLDO VDDP to 0.9V or 0.95V. It does not need to be at 1.09V which auto sets too high.

Yeap , thanks for help , its a pretty good increase from stock/xmp for sure , i dont think i even need more but looking at the 1933Mhz FCLK performance there is where i would have liked to be.
If i need more performance i can just increase BLCK tot 101 or something , it worked fine with my 3700x probably it will work with the 5700x but ill leave it at default for now.

I played a bit with the voltages but same thing , instant WHEAs when running OCCT SSE stress test at 1933Mhz, not sure if i did the right combination of voltages, at 1900Mhz or higher, other than 1933Mhz, WHEAs in all benchmarks , interesting thing is that it works without crashing or any noticeable hangs up to 2000Mhz.
I did VSOC up to 1.2 , nothing changed , did CLDO VDDP and IOD from 0.9 to 1.1 same thing. The only thing left for me to do is try different combinations of them i guess. When ill have time ill try and play a bit more with this and see if i can find a combination that works.

Edit: After googling a bit seems that many people with 5800x cant get 1900mhz+ without WHEAs, dont think its even worth to try after reading this.

 

[GWARslave119]

Yeah that's what i was told/read. I'm currently trying to get mine stable, or more stable than I thought it was. I used to use the TM5 extreme config, but someone said ycruncher might pick up errors that tm5 doesn't. All these timings are easily mixed up in my head at times ha, so I'm having a hard time trying to remember where any errors I get come from. Atm I'm shooting for tCL 17 , and with gdm off it seems that tCWL is more stable on even values. But I think the lower your tCL, the higher tRDWR has to be I think? Tryna see if there's any info on gauging different performance impacts on certain timings and I seem to find a mix of info. This is what I'm at right now and tryna alleviate them Convolution algorithm erorrs or whatever in ycruncher. Again, I thought that where I'm at now was considered stable but ycruncher says nuh uh

Edit: Oh umm the only values atm that are on Auto are uhh, tRFC2/tRFC4 (i forget offhand if those were important to be manually entered), tRCpage, and the 3 RTT rzq thingies, which I'm not exactly sure what those might help with if I were to manually change them

Oh also the ram in question uses micron rev e ofc, this one here

 

[izy]

Yeah that's what i was told/read. I'm currently trying to get mine stable, or more stable than I thought it was. I used to use the TM5 extreme config, but someone said ycruncher might pick up errors that tm5 doesn't. All these timings are easily mixed up in my head at times ha, so I'm having a hard time trying to remember where any errors I get come from. Atm I'm shooting for tCL 17 , and with gdm off it seems that tCWL is more stable on even values. But I think the lower your tCL, the higher tRDWR has to be I think? Tryna see if there's any info on gauging different performance impacts on certain timings and I seem to find a mix of info. This is what I'm at right now and tryna alleviate them Convolution algorithm erorrs or whatever in ycruncher. Again, I thought that where I'm at now was considered stable but ycruncher says nuh uh

Edit: Oh umm the only values atm that are on Auto are uhh, tRFC2/tRFC4 (i forget offhand if those were important to be manually entered), tRCpage, and the 3 RTT rzq thingies, which I'm not exactly sure what those might help with if I were to manually change them

Oh also the ram in question uses micron rev e ofc, this one here
View attachment 329626

You should check for WHEA errors , everything more or equal to 3800mhz has WHEA errors for me.

 

[GWARslave119]

You should check for WHEA errors , everything more or equal to 3800mhz has WHEA errors for me.

Yeah that's one if the things I was told when I first started all this quite a while ago ha. But no, no whea errors have ever been reported. Not once in the past year, year and a half. That used to make me wonder if windows for some reason is misreporting? But over time I kinda forgot about that.