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MediaTek Announces the Dimensity 9300 Flagship SoC, with Big Cores Only

TheLostSwede

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MediaTek today announced the Dimensity 9300, its newest flagship mobile chip with a one-of-a-kind All Big Core design. The unique configuration combines extreme performance with MediaTek's industry-leading power efficiency to deliver unmatched user experiences in gaming, video capture and on-device generative AI processing.

"The Dimensity 9300 is MediaTek's most powerful flagship chip yet, bringing a huge boost in raw computing power to flagship smartphones with our groundbreaking All Big Core design," said Joe Chen, President at MediaTek. "This unique architecture, combined with our upgraded on-chip AI Processing Unit, will usher in a new era of generative AI applications as developers push the limits with edge AI and hybrid AI computing capabilities."




MediaTek's next generation APU 790 AI processor is integrated into the Dimensity 9300 and designed to significantly improve generative AI performance and energy efficiency for faster and more secure edge computing. The APU 790 doubles the integer and floating-point operations performance, while reducing power consumption by 45%. By adapting the Transformer model for operator acceleration, the processing speed of the APU 790 is 8 times faster than the previous generation, with image generation within one second using Stable Diffusion. MediaTek has developed mixed-precision INT4 quantization technology, which when combined with the company's NeuroPilot memory hardware compression, can more efficiently utilize memory bandwidth and significantly reduce memory requirements for large AI models. The APU 790 provides support for NeuroPilot Fusion, which can continuously perform LoRA low-rank adaptation, and is capable of supporting large language models with 1B, 7B, and 13B parameters, with scalability up to 33B. As part of MediaTek's rich AI ecosystem, the Dimensity 9300 will support cutting-edge mainstream large language models including Meta Llama 2, Baichuan 2, Baidu AI LLM, and more. This helps developers quickly and efficiently deploy multi-modal generative AI applications to provide users with generative AI experiences such as text, images, and music.

With Arm's latest flagship GPU, the Immortalis-G720, the Dimensity 9300 supercharges mobile gaming experiences. The Dimensity 9300 offers an almost 46% boost in GPU performance while at the same level of power consumption as the Dimensity 9200. The Dimensity 9300 provides a 40% reduction in GPU power consumption at the same level of performance as the previous generation chipset.

The Dimensity 9300 reimagines mobile photography and video capture by combining a low-power AI-ISP and always-on HDR up to 4K resolution at 60 frames per second (FPS). The chipset also supports 4K at 30 FPS cinematic mode with real-time bokeh tracking for professional quality bokeh enhancements, as well as 4K AI Noise Reduction (AI-NR) and AI processing on RAW photos and videos. It will support the new Ultra HDR format in Android 14 for the next generation of smartphones.

The Dimensity 9300 display system leverages the chipset's powerful on-device AI capability to detect primary objects and background images in real-time. Coupled with the MiraVision Picture Quality (PQ) engine, it will dynamically adjust the optimal contrast, sharpness, and color of primary objects, comparable to today's Flagship DTVs.

Other key features include:
  • Big core power: The Dimensity 9300 is built on TSMC's third generation 4 nm process with four Arm Cortex-X4 cores with operating speeds of up to 3.25 GHz and four Cortex-A720 cores operating up to 2.0 GHz to maximize performance.
  • Faster display speeds: It supports WQHD at 180 Hz and 4K up to 120 Hz to provide stunning visuals, along with dual active display support for foldable form factors.
  • Seamless 5G connectivity: The 5G R16 modem supports 4CC-CA Sub-6 GHz and 8CC-CA mmWave with MediaTek's UltraSave 3.0+ technology for improved power efficiency.
  • Speedy memory: Dimensity 9300 supports LPDDR5T 9600 Mbps memory, currently the highest speed available.

Equally important to these features centered around the user experience, the Dimensity 9300 offers superior security for flagship Android devices. The chipset's privacy-focused security design resists physical attacks on data access by protecting important processes during boot-up and when performing secure computing.

The first smartphones featuring the Dimensity 9300 chipset will be available in the market by end of 2023.

View at TechPowerUp Main Site | Source
 
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The press release claims that it has four Cortex A720 cores as well. That makes the headline rather inaccurate.
 
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The press release claims that it has four Cortex A720 cores as well. That makes the headline rather inaccurate.
Isn't the Cortex A720 counted towards the big cores?
 
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9000+ and 9200 had support for 8K video recording. Yes outside has limited number of phones with this SoCs that enabled 8K video recording but. In this article 8K isn't mentioned?
 
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When you have nothing new, drop the little cores and increase the BIG cores.

Prepare for Intel to do this in the near future when their fab processes are advanced enough.
 
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When you have nothing new, drop the little cores and increase the BIG cores.

Prepare for Intel to do this in the near future when their fab processes are advanced enough.
Yields and power consumption are both problems.
 
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But are they really big cores if you only have one type of core? o_O:p
 

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So x86/x64 is going big little and now ARM is going in the opposite direction with big cores only, is that right? lol o_O:laugh:
 
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Big cores, little cores...

Little whores, big whores...

Does anyone really know what time it is, hehehe ?
 

isomane

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So x86/x64 is going big little and now ARM is going in the opposite direction with big cores only, is that right? lol o_O:laugh:
Correct me if I'm wrong but isn't that because now with current nodes and transistor density you are able to physically fit 8 big cores and also due to the fact that square area is presumably similar to 4 big + 4 little cores from older nodes, the yields are acceptable and therefore price is also acceptable?

And for x86/x64 isn't that just mostly to allow squeezing crazy amount of cores in mainstream market while not sacrificing much of anything else?

One more thing I wonder about is why people are not trying to design chips with more than 8 cores for Android - is it so optimized to utilize specifically 8 cores that going for example 6 big + 4 little instead of 8 big wouldn't make sense?
 

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Correct me if I'm wrong but isn't that because now with current nodes and transistor density you are able to physically fit 8 big cores and also due to the fact that square area is presumably similar to 4 big + 4 little cores from older nodes, the yields are acceptable and therefore price is also acceptable?
Uhm, no. You can fit four small cores in the same die area as one big core.
Here's Apple's M1 as an example of that.



One more thing I wonder about is why people are not trying to design chips with more than 8 cores for Android - is it so optimized to utilize specifically 8 cores that going for example 6 big + 4 little instead of 8 big wouldn't make sense?
There were some, like the MTK Helio X20, but it was meh as far as I remember.
Qualcomm made the Snapdragon X Elite a 12-core SoC, but that's for Windows on Arm.
 

isomane

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Uhm, no. You can fit four small cores in the same die area as one big core.
I'm aware of that and also your sentence doesn't contradict my comment. What I meant is that while on older, less denser nodes, fitting 8 big cores wouldn't be feasible due to area restriction / price (due to large chip area), so people had to find a balance between big and little cores, now on current denser nodes there is no need anymore to use as many (or any in this example) little cores as you can fit 8 big cores in reasonable area.
 
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I'm aware of that and also your sentence doesn't contradict my comment. What I meant is that while on older, less denser nodes, fitting 8 big cores wouldn't be feasible due to area restriction / price (due to large chip area), so people had to find a balance between big and little cores, now on current denser nodes there is no need anymore to use as many (or any in this example) little cores as you can fit 8 big cores in reasonable area.
It's much worse now, with yields below average (if this is produced at 3nm). A bigger chip is inevitably more expensive.

It turns out that MTK is desperate to appear better than Qualcomm in synthetic benchmarks, in the real world this may even be more efficient, but it will still consume more energy etc... I don't even know why smartphones need so much investment in CPU side like if they were professional workstations or gaming platforms...
 

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Anandtech considered it a middle core, but as it is better than the A78, it could be a big core.

Both A715 and A720 are no slouch for sure, latest Dimensity and SD 8G2 have proven that by now. But........from the spec list the clocks are so low on the A720, they may as well be acting in a little core capacity here. They are clocked lower than A520 in SD 8G3 and equal to A510 in SD 8G2. Interesting strategy here on Mediatek's part for sure.

Doubtful. You might have missed the clock speeds. Big cores at lower clock speeds and voltages are still efficient. Yields are the exact same.
It's much worse now, with yields below average (if this is produced at 3nm). A bigger chip is inevitably more expensive.

It turns out that MTK is desperate to appear better than Qualcomm in synthetic benchmarks, in the real world this may even be more efficient, but it will still consume more energy etc... I don't even know why smartphones need so much investment in CPU side like if they were professional workstations or gaming platforms...

It's not 3nm though? The press release states "3rd gen" 4nm, right there in the article. I'm guessing "3rd gen" refers to N4X or something.

That said, it's not like N4/N4P aren't already well-known. It's a great node but running four 3GHz+ Cortex-X4 is still pure unadulterated hopium. The key is probably in the "up to" in the press release - it's going to be like desktop and laptops (especially), 1T clocks much higher than nT clocks. If freq drops substantially as more Cortex-X4s come online as expected, then they maybe won't be all that different than say, a normal cluster of up to ~3GHz Cortex-A720.

If there's only 1 x Prime, there's not much to it aside from the rated clockspeed, it can certainly hit that all the time with the right cooling. With even just one additional Cortex-X1, Google ran into major thermal problems in Tensor without much performance benefit to show for it, and they've now ditched it (although Samsung 4nm/5nm is such a POS, it certainly contributed significantly to that result). Some major throttling will be going on by design with a quad core cluster of Cortex-X4, I don't care how good the N4 node is.
 
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Ah so what is battery life like and how many milliseconds does it take to throttle. Smartphone makers really aren't that smart IMO. Last things phones needs in moar pwer!
 
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Correct me if I'm wrong but isn't that because now with current nodes and transistor density you are able to physically fit 8 big cores and also due to the fact that square area is presumably similar to 4 big + 4 little cores from older nodes, the yields are acceptable and therefore price is also acceptable?

And for x86/x64 isn't that just mostly to allow squeezing crazy amount of cores in mainstream market while not sacrificing much of anything else?

One more thing I wonder about is why people are not trying to design chips with more than 8 cores for Android - is it so optimized to utilize specifically 8 cores that going for example 6 big + 4 little instead of 8 big wouldn't make sense?

The phone market was initially about power efficency. If you can move background processing to lower powered/more efficent cores while leaving the higher power cores free for the tasks that benefited from Higher IPC and higher clocks it meant a single high performance core was more than acceptable until relatively recently for phones/tablets.

Also trying to cool multiple BIG cores which are at full speed and load in a phone platform is near impossible/physically prohibitive. So why commit ~33-50% more die space for little to no overall benefit beyond synthetic benchmarks
 

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It's much worse now, with yields below average (if this is produced at 3nm). A bigger chip is inevitably more expensive.

It turns out that MTK is desperate to appear better than Qualcomm in synthetic benchmarks, in the real world this may even be more efficient, but it will still consume more energy etc... I don't even know why smartphones need so much investment in CPU side like if they were professional workstations or gaming platforms...
Apparently it's more power efficient.
 
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isomane

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The phone market was initially about power efficency. If you can move background processing to lower powered/more efficent cores while leaving the higher power cores free for the tasks that benefited from Higher IPC and higher clocks it meant a single high performance core was more than acceptable until relatively recently for phones/tablets.

Also trying to cool multiple BIG cores which are at full speed and load in a phone platform is near impossible/physically prohibitive. So why commit ~33-50% more die space for little to no overall benefit beyond synthetic benchmarks
I've always felt like little cores are more about saving space while having an additional core. Do we know for sure that if big cores were clock optimized (we can assume running the same clock as little core), required energy would be higher to run particular code? They do draw more power but they would also get it done quicker which could result in less energy used if clocks were running at peak of efficiency curve.

There is already a test of Dimensity 9300 from Geekerwan that includes power draw. Across all the power draw range, Dimensity 9300 is performing better in both versions of Geekbench than any other chip on the market (even those built from 4 big + 4 little cores), meaning it's more energy efficient. If big cores were inefficient by themselves, would it be possible?
 
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I've always felt like little cores are more about saving space while having an additional core. Do we know for sure that if big cores were clock optimized (we can assume running the same clock as little core), required energy would be higher to run particular code? They do draw more power but they would also get it done quicker which could result in less energy used if clocks were running at peak of efficiency curve.
To answer your question: It depends. Looking at the core design the larger L1 and L2 areas will draw more power on the Coretx X4s, but if you clock optimised then you could reduce that impact massively but it will always have that handicap in the power consumption area especially on code that isnt filling the extra cache/doesnt benefit from the cache due to cache misses that impact both cores.

~Acting as an OEM~

But again what is the point of dedicating extra silicon for the x% gain you may get in High power situations but for the background tasks like the OS/Celluar connections/background we expect to be there for >50% of the time that dont really benefit from that extra power draw/silicon cost etc. Most of the time these e cores arent doing things that are time/performance limited. How often are we expecting our device owner to be using these devices as gaming devices/media encoding etc vs being idle

With this extra possible powerdraw and in turn heat do we need to review our thermal soloution to be renegineered/beefed up to cope with this?

Also with things like 3nm having poorer yields atm as its really early in its life cycle would mean less valid CPUs/wafer is that worth it from both a cost to the company which in turn would have to be passed onto the consumer.

~Back to normal~

Now from a consumer perspective I am behind the "more BIG core is moar better", until we hit questions about power consumption. In the graph floating around I found it a little interesting that the Snapdragon Gen 3 was measured all the way down to sub 2 watt. The 9300 didnt go lower than 3.5. Now in a phone that may be idle a lot of the time/just browsing etc either the core parking/scheduler needs to be amazing (but the Gen 3 can have those same features) the power draw could cause issues unless for some reason every phone with a Mediatek chipset has a larger battery.
 
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