14900k - Tuned for efficiency - Gaming power draw

[Panther_Seraphin]

Could they also be doing this because HT has been vulnerable to attacks in the past? Is this still a viable question with HT on, or has this problem been fixed up via CPU micro codes?

This is the real reason.

HT in the enterprise environment has proved time and again in recent times to be one of if not the easiest attack vectors currently known especially with it being used to bypass virtualisation security by being able to access whatever is running on the other thread on the same CPU when its not from the same VM.

AMD have already got offerings in via Zen 4c (EPYC 9754S) that suits these use cases to please major cloud providers/heavy virtualisation users.

XMP is another bucket of worms. If the compatibility is poor the user experience may be riddled with problems (hello AM4, not sure about modern Intel).
Another consumer unfriendly area, although it improved, but still unfriendly.

XMP is an Intel standard that AMD "Supports" but I doubt they have put the a lot of resource into XMP as they have developing their own standard EXPO. Also with memory speeds and timings getting faster and tighter the differences in memory controller performance and optimization highlights how a "one size fits all" approach to memory isnt working as it once was.

 

[BoggledBeagle]

This is the real reason.

HT in the enterprise environment has proved time and again in recent times to be one of if not the easiest attack vectors currently known especially with it being used to bypass virtualisation security by being able to access whatever is running on the other thread on the same CPU when its not from the same VM.

A good thing about 14900K is that it has so many e-cores, that it really does not need HT and if HT will need to be disabled in the future, I will not notice it at all.

 

[dgianstefani]

A good thing about 14900K is that it has so many e-cores, that it really does not need HT and if HT will need to be disabled in the future, I will not notice it at all.

That and the security reasons. Future chips will have 32 etc E cores.

Mobile chips already have three groups of cores, the P cores, the E cores, and the two E cores on a low power island with the IO so the rest of the chip can be power gated. This is coming to desktop too.