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AMD FM1 Socket, Package Pictured

I bet Memory bandwidth is the bottle neck.
If there's going to be 4 dimms, make it quad channel.
If 2 make it dual. I know they will change it.
 
MikeX said:
I bet Memory bandwidth is the bottle neck.
If there's going to be 4 dimms, make it quad channel.
If 2 make it dual. I know they will change it.
Click to expand...

Memory bandwidth is the bottleneck for all x86 style computer systems. It is the nature of the design.

Quad channel would A, require a crap load more pins and wouldn't be nearly as beneficial for a low to mid ranged processor class.

And what are they going to change? These are guesses as to what AMD is working on. These are final configurations of released OEM chips. They may not come to America, but someone, somewhere is getting these processors in a computer.
 
Simply upping frequencies makes up for bus width, and this has been proven time and again.
 
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