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AMD Patents new System and Method for Protecting GPU Memory Instructions Against Faults

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Aug 19, 2017
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With ever increasing number of exploits, processor manufacturers are finding new and improved ways to secure their system against such dangers. Exploits can be found on hardware and software level, but ones on hardware level are harder to patch and protect against. If you remember Spectre and Meltdown, they used CPU's branch speculation to enforce unwanted instruction stream. At software/firmware level we also got a fair number of exploits like recent "Screwed Drivers" incident, where drivers signed and approved by Microsoft are susceptible to privilege escalation.

However, AMD has patented a new way for protecting GPU memory instruction against faults by using a new system method. The proposed method uses system's "master and slave" devices and manipulates their instruction streams and check for any errors in the process. Firstly, the proposed system converts "slave" device request to dummy operations like NOP (No OPeration) is, and modifies the memory arbiter to issue N master and N slave global/shared memory instructions per cycle, sending master memory requests to memory system. Then it uses slave requests to check for errors and enter master requests in to memory FIFO aka First In First Out memory buffer. Slave request is stored in a register. Finally two values from register, where slave request was stored, and FIFO are compared to see if there are any differences.


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