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core 2 quad numa affinity and scheduling

I was afraid not from memory access penalty which as you say is the same, but from penalty associated with inter-die communication such as: process migration from one die to another, inter-process communication between several processes across the separate dies (which in my case would be avs2yuv.exe sending it's finished frames from one die, while the encoder process x264 is running on another)

There isn't really a means to mitigate this except to disable two cores. It just is how things work.
 
I can't provide a source at the moment, but I'm pretty sure that's not true. I have always been under the impression that C2Q dies talked over the FSB, which was one of the architecture's major drawbacks for multithreaded applicatons. QPI, the on-die interconnect, didn't come until the i7's first iteration. Like I said... I thought this was common knowledge, so I haven't really researched it in forever. May need to dig up some old articles and verify.
I would be interested in seeing such articles. I looked before making that statement because I hate to post something not right. But I could not find anything that said communications between the two CPU sections required going out and through the motherboard FSB. That sure does seem highly inefficient.
 
I would bet windows already has some sort of scheduling optimization for Core 2 processor.

Modern Ryzen CPUs are made in the exact same way using two dies and they run just fine.

XP and I believe Vista had issues with it where as 7-10 do not
 
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