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GPU Memory Mapping

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#1
[AMD, in context of Tahiti] should have really used a different name other than IOMMU to explain what they were doing, because GART is an IOMMU.

I've been confused about that ever since it was mentioned, because it said they would finaly abandon GART and use IOMMU, which is very confusing and extrictly false. (since they were already using IOMMU)
 
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cadaveca

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#2
GART doesn't have the address translation abilities that an IOMMU does.

The GART was originally designed to allow graphics chips to read textures directly from system memory, using address translation to gather allocations in system memory into a contiguous region mapped to an address that the graphics device could see. But the GART has also been put to use by Linux kernel programmers to enable legacy 32-bit PCI devices to access regions of system memory outside of their addressable range. This is done by programming the device to work inside the "graphics aperture" memory region controlled by the GART, and then using the GART to translate this address to the real target address, above 4 GB.

The new IOMMU can do this trick, too, only without the restrictions of the GART (which, after all, wasn't designed for this purpose). While the GART is limited to working inside the graphics aperture, the IOMMU can translate any address presented by the device to a system address.

More important, the IOMMU provides protection mechanisms that restrict device access to memory, whereas the GART performs translation only. It's the combination of address translation and access protection that makes the IOMMU so valuable for virtualization.
http://developer.amd.com/documentation/articles/pages/892006101.aspx
 
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#3
Could someone please enlighten me on IOMMU, I have no idea what it is, and what capeabilities it has...
Is it just a means to increase memory bandwidth another 128 bit?
 

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#4
An IOMMU is like a memory controller, and can access sytem ram directly(rather than via the GART space, that has limitations), without interfering with the other controllers that access the same address space.

It's currently unknown how deep the bus will be, or what bus will be used.
 
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#5
Could someone please enlighten me on IOMMU, I have no idea what it is, and what capeabilities it has...
Is it just a means to increase memory bandwidth another 128 bit?
In computing, an input/output memory management unit (IOMMU) is a memory management unit (MMU) that connects a DMA-capable I/O bus to the main memory. Like a traditional MMU, which translates CPU-visible virtual addresses to physical addresses, the IOMMU takes care of mapping device-visible virtual addresses (also called device addresses or I/O addresses in this context) to physical addresses. Some units also provide memory protection from misbehaving devices.​

For more details, see http://en.wikipedia.org/wiki/IOMMU
 
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#6
GART doesn't have the address translation abilities that an IOMMU does.



http://developer.amd.com/documentation/articles/pages/892006101.aspx
I know the difference between AMD's new IOMMU(TM) and GART, but GART is an IOMMU (general term) nonetheless.

GART does not have ALL the translation abilities that the new IOMMU has, but it certainly has translation abilities and it is without a doubt an I/O memory management unit.

Like I said it's unnecesarily confusing, when they could have called it with a different name IMO.

EDIT: HA! Even the wiki article uses GART as the de facto example for an IOMMU.
 

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#7
I remember when it was all sorts of cool to adjust GART in the bios for AGP cards. Any one else remember that?
 

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#8
I know the difference between AMD's new IOMMU(TM) and GART, but GART is an IOMMU (general term) nonetheless.

GART does not have ALL the translation abilities that the new IOMMU has, but it certainly has translation abilities and it is without a doubt an I/O memory management unit.

Like I said it's unnecesarily confusing, when they could have called it with a different name IMO.

EDIT: HA! Even the wiki article uses GART as the de facto example for an IOMMU.
Yeah, I get what you mean, but to me personally, IOMMU is much more capable than the seemingly restricted GART space, so it's easy for me to diferentiate between the two. The GART space and it's abilities are quite obvious, but IOMMU usage and abilities varies between who designed it. Both AMd and Intel have their own IOMMU specifications, while GART is very similar no matter the platform.

GART is an IOMMU, but all IOMMUs are NOT GART. NO confusion for me!
 
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#9
Yeah, I get what you mean, but to me personally, IOMMU is much more capable than the seemingly restricted GART space, so it's easy for me to diferentiate between the two. The GART space and it's abilities are quite obvious, but IOMMU usage and abilities varies between who designed it. Both AMd and Intel have their own IOMMU specifications, while GART is very similar no matter the platform.

GART is an IOMMU, but all IOMMUs are NOT GART. NO confusion for me!
IOMMU is much more capable than the seemingly restricted GART space
NO, really. That's the confusing part. An IOMMU can be either more capable than GART or less capable/more restricted than GART, depending on the implementation. IOMMU is not inherently more capable than GART, and saying this sounds already stupid because GART is IOMMU.

You just can't say that, just like you can't say that vehicles are more capable than cars. A bicycle is a vehicle and is not more capable than a car. So then please, don't call your newly invented vehicle (wheter it is a car, a truck, a motorcycle or a completely new thing), Vehicle.
 

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#10
NO, really. That's the confusing part. An IOMMU can be either more capable than GART or less capable/more restricted than GART, depending on the implementation. IOMMU is not inherently more capable than GART, and saying this sounds already stupid because GART is IOMMU.

You just can't say that, just like you can't say that vehicles are more capable than cars. A bicycle is a vehicle and is not more capable than a car. So then please, don't call your newly invented vehicle (wheter it is a car, a truck, a motorcycle or a completely new thing), Vehicle.
Ok, but GART is GRAPHICS ADDRESS RELOCATION TABLE.

It has been modified to work with other devices, but inherently, is for graphics use.

IOMMU is not graphics-specific, nor does it need modification for general I/O(and hence IOMMU).

I understand your confusion, but it's not really all that confusing.

BTW, GART is the reserved space, and the IOMMU, basically, accesses the GART space. The space is referred to as GART, and an IOMMU accesses the GART space.

Your confusion arises not from the misnaming of IOMMU, but from the lack of a meaningful explanation as to what GART is..which is merely a reserved space in system ram. It's not AMD's fault, nor yours..blame those that in the past weren't specific enough as to what GART really is.
 
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#11
Ok, but GART is GRAPHICS ADDRESS RELOCATION TABLE.

It has been modified to work with other devices, but inherently, is for graphics use.

IOMMU is not graphics-specific, nor does it need modification for general I/O(and hence IOMMU).

I understand your confusion, but it's not really all that confusing.

BTW, GART is the reserved space, and the IOMMU, basically, accesses the GART space. The space is referred to as GART, and an IOMMU accesses the GART space.

Your confusion arises not from the misnaming of IOMMU, but from the lack of a meaningful explanation as to what GART is..which is merely a reserved space in system ram. It's not AMD's fault, nor yours..blame those that in the past weren't specific enough as to what GART really is.
GART is the name used for an IOMMU implementation that uses a graphics address remapping table to do its work. GART is not (only) the reserved space, but rather a method and an implementation in silicon, which makes it a device and an IOMMU.

I'm not confused about what is what at all. I know both implementations. I was confused when I first heard it, because like I said, they were claiming to use IOMMU for the fisrt time in a GPU, which is completely false.

What they really want to say is that they are going to use AMD IOMMU (a trademarked tech, I suppose) for the first time, which like GART is an IOMMU (general term) implementaion.

The confusion arises because they took a general term, used to describe a technology and applied it to one of their implementations of such tech.
 

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#12
GART is the name used for an IOMMU implementation that uses a graphics address remapping table to do its work. GART is not (only) the reserved space, but rather a method and an implementation in silicon, which makes it a device and an IOMMU.
Yes, exactly and this explanation you've listed is the problem. As you say, GART as it is commonly thought of, is not just the MMU, but also the space in the physical system ram, as well as the methodology.

GART has never been considered as it's seperate elements, merely as a technology that encompasses many parts. Had it been explained and taught that way(as seperate technologies), there'd be no issue here.

I see it as AMD taking a specific term from what is part of GART, rather than the general term of GART, and used just the important part..the MMU. However, because it's a Memory Mangement Unit for any I/O(such as in use for virtual machines), it makes more sense to me than it does to you. No big deal. ;)

Explanations for GART that use the term "IOMMU" are wrong, IMHO, and should only be using "MMU".
 
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#13
Explanationd for GARt that use the term "IOMMU" are wrong, IMHO, and should only be using "MMU".
But its main purpose is to manage I/O between 2 different memory spaces, so the term is correct. Memory management unit is too generic and could be confused with memory controler.

Really my only issue is that they are using IOMMU to name their own implementation. While on original paper(s), they say AMD's IOMMU at first, in consequent paragraphs and documents (and press releases) "AMD's" is eliminated and only IOMMU is used, creating unneccesary confusion.

It's as if they created a new memory controller for a new type of memory and called it Memory Controller, later appearing in every paper that a certain CPU/GPU uses Memory Controler* for the first time and that it is 2x faster than DDR3. Inneccesary confusion.

In this case the capital letters give it away as a trademark, something that does not happen with IOMMU for being all capital letters.
 

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#14
Yeah, I get where you are coming from.

I mean, in my head, I know that IOMMU refers to an MMU separate from the CPU memroy controller, that has access to system ram. Current implementation gives the IOMMU access to ALL system ram, rather than the small 256MB GART space.


I agree 100% that naming conventions could be differnt, and it even seems that Intel agress with you, having thier own terminology, but myself, I think the past did things wrong, and it should be corrected.

I will NOT confuse MEMORY CONTROLLER and MEMORY MANAGEMENT UNIT, for example. They have different meanings to me.
 
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#15
Yeah, I get where you are coming from.

I mean, in my head, I know that IOMMU refers to an MMU separate from the CPU memroy controller, that has access to system ram. Current implementation gives the IOMMU access to ALL system ram, rather than the small 256MB GART space.


I agree 100% that naming conventions could be differnt, and it even seems that Intel agress with you, having thier own terminology, but myself, I think the past did things wrong, and it should be corrected.

I will NOT confuse MEMORY CONTROLLER and MEMORY MANAGEMENT UNIT, for example. They have different meanings to me.
Yes to you, because you are tech savvy and because you read about the technology. Average Joe trying to learn about tech would be easily confused by the similarity of what the 2 words mean.

I consider myself to be realtively tech-savvy, but that didn't prevent me from being confused when I first read it in a press release. I had no idea what they were trying to tell "me" and felt like lying or bending the truth. I had to look for and read many difficult to find documents before I understood exactly what they meant by "using IOMMU for the frst time". They could have avoided the confusion by just simply calling it AIOMMU (AMD IOMMU), RIOMMU (because they are using it on Radeons) or anything they wanted other than just IOMMU, and that would have alredy put me in the right direction.

"We are using A(R)IOMMU, a new tech that departs from GART... bla bla bla"
 
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#16
So what's the IOMMU gonna do for me? Free up CPU cycles as the card will load textures directly from system RAM without the CPU having to load and send them?
 
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#17
Current IOMMU (GART) already does that, but only from a predefined memory pool. Th new IOMMU will be able to do it from the entire ram, that's the main capability, while most other new features are derived from that one, basically for security, they are there to prevent the GPU from messing up main memory and/or "fight" with the CPU for resources.

The new IOMMU will have very little consequence for graphics, if at all. The benefit is entirely for compute applications. Now the GPU compute program (or the portion of it that runs on GPU) has to run in GART space, and the CPU side on main memory, meaning that when the GPU changes the value of a certain variable, the CPU can't see it and viceversa. So you can 't use the same variables for CPU and GPU, they need to be replicated and manually updated afterwards (when required). This adds a massive lag.
 
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