Intel 18A Process Node Clocks an Abysmal 10% Yield: Report

[londiste]

Can anyone see a die size or transistor count or estimate of either for what Broadcom was trying to produce?

 

[close]

Well, now we know why the CEO change. Damn, Intel is having a hell of time. I honestly hope they make a comeback, every economy needs three competitors to thrive imo. Duopolies suck for innovation.

Their foundry has been having a "hell of a time" since at least 14nm (+++++).

 

[AnotherReader]

Can anyone see a die size or transistor count or estimate of either for what Broadcom was trying to produce?

Broadcom's switches use enormous dies which are suspected to be running into the reticle limit. They should be at least 600 mm^2. In fact, plugging in a 800 mm^2 die with a defect density of 0.4 per square cm into isine's die yield calculator results in a yield of 9%. Pat Gelsinger claimed that defect density for 18A was less than 0.4 in September. For context, TSMC's defect density for N10 was also above 0.4 three quarters before mass production; N5 and N7 fared better.

 

[redeye]

Korean publications have also claimed Samsung foundry has better yields then tsmc. Considering how corrupt south Korea is, they might be doing the same thing now.

(Italics mine)
Proof needed (I doubt it. even a Netflix Korean show with a plot line of corruption) or are you confusing “corrupt” with “chaebol”
never mind, off topic…

 

[GhostRyder]

That is pretty abysmal and explains alot. Right now Intel really needs some changes to bring them back in the game. I mean they are not making money hand over fist like they were 7 years ago and they really have no excuse. They are nowhere near as bad as AMD was with Bulldozer, but man its amazing how many issues Intel currently has.

 

[Bobaganoosh]

I'm still very curious what happened with Intel 7nm ("intel 4"). it was supposed to be their big transition to EUV and was promised to show the largest improvement node-to-node in many years. Then it just disappeared. It seems like they just keep building fabs they don't use. cancelling 20A to focus on 18A instead of running them in parallel so close together seemed like a good call to me at first because it seemed extremely wasteful and counter-productive to not focus resources on each node that would produce a real improvement instead of scatterblasting resources and none of them getting full effort. I honestly have no idea what's going on there lol

 

[Chaitanya]

I had high hopes for Intel making a comeback with all their Lunar Lake/Arrow Lake and 20A/18A hype. With Lunar Lake somewhat delivering an efficiency improvement but with middling performance, Arrow Lake being a massive disappointment (despite of using the most expensive TSMC 3nm class node) and other than idle efficiency is a waste of sand. Now 18A being pushed back to who knows when... they are done. Completely done to me. I see no reason to even read or think about this company anymore.

Everyday Apple is proven right to have dumped the turd that was Intel, even when using more advanced node than competition their CPUs are power hungry and slow.

 

[Chrispy_]

Intel foundries have been failing continuously since 2014 once Core-M was launched and 14nm was out the door. It was Intel's last "good" node.

In 2018, they announced that their already-three-years-late 10nm process was delayed further. The first CPUs on the overdue 10nm node (Cannon Lake) were a total failure. Yields were %, Intel cancelled the entire generation after releasing a small number of partially working dies as i3 F-series variants with broken IGPs.

Intel 10nm was rebranded Intel 7 once it stopped producing completely broken dies, and Alder Lake launched but it still sucks. Half the reason 13th and 14th Gen are such power-hungry, self-destructing nightmares is the process node. The other half is desperation to remain competetive, pushing the inferior process node to voltages and clocks to silly levels. Cue yet another class-action lawsuit, and mass-recalls.

I don't know much about Intel's planned nodes, but they're already behind schedule, and failing on yields - 18A should have been out in the second half of this year.

Technically they still have two weeks but it looks more like it's a good 2+ years away from being viable based on this news.

 

[ymdhis]

It's great to see that after all those years, they finally managed to progress from the 14mm+++++ node.

 

[AnotherReader]

Intel foundries have been failing continuously since 2014 once Core-M was launched and 14nm was out the door. It was Intel's last "good" node.

In 2018, they announced that their already-three-years-late 10nm process was delayed further. The first CPUs on the overdue 10nm node (Cannon Lake) were a total failure. Yields were %, Intel cancelled the entire generation after releasing a small number of partially working dies as i3 F-series variants with broken IGPs.

Intel 10nm was rebranded Intel 7 once it stopped producing completely broken dies, and Alder Lake launched but it still sucks. Half the reason 13th and 14th Gen are such power-hungry, self-destructing nightmares is the process node. The other half is desperation to remain competetive, pushing the inferior process node to voltages and clocks to silly levels. Cue yet another class-action lawsuit, and mass-recalls.

I don't know much about Intel's planned nodes, but they're already behind schedule, and failing on yields - 18A should have been out in the second half of this year.

View attachment 374519

Technically they still have two weeks but it looks more like it's a good 2+ years away from being viable based on this news.

Even 14 nm had issues and caused shipments of Broadwell to be delayed by a quarter. Of course, this was nothing compared to the issues affecting Intel 7, which was a debacle until they finally fixed it by the time Tiger Lake rolled out. As for 18A, a defect density of around 0.4 suggests that it would take them another year to reach yields appropriate for mass production. This 10% figure is for Broadcom's chips which include monsters rivaling Nvidia's datacenter offerings in die size. A 10% yield for such a chip isn't catastrophic at this stage.

 

[TristanX]

Yield is highly relative metric. For small chips it can be 80%, for big chips with repeatable units it can be 60-70%, for big chips without repeatable units it can be 10%. Which case is for 18A yield ?
Pat said that 18A is equivalent to N2, or even to A16 because it have Power Via. N2 will start late next year, and be in mass production for some 5 years, as with N3. That is enough time for 18A bo mature and be even better, because of Power Via, and maybe other enhacements along the way.

 

[Darmok N Jalad]

I had high hopes for Intel making a comeback with all their Lunar Lake/Arrow Lake and 20A/18A hype. With Lunar Lake somewhat delivering an efficiency improvement but with middling performance, Arrow Lake being a massive disappointment (despite of using the most expensive TSMC 3nm class node) and other than idle efficiency is a waste of sand. Now 18A being pushed back to who knows when... they are done. Completely done to me. I see no reason to even read or think about this company anymore.

Personally, I think their P+E approach is just adding to the problems. It adds even more complexity that can hamper performance, and when that occurs, you end up with wasted energy. I’m still not convinced that P+E has a practical use case in high-performance computing. Apple seemingly makes it work, but we really don’t know how they go about it or understand the differences between their P and E cores. Even then, they don’t pile on the E cores in their high end chips, but instead reduce E cores and add P cores. Sure, there are benchmarks that show P+E works, but as a daily user of such a chip, I can tell you the day-to-day experience leaves much to be desired.

Intel has gotten stingy with P cores since Comet Lake. It would be nice to see them do their own chiplet+IO die approach to get more P cores in our hands, or maybe use Tiles for that somehow.

It might seem like my thoughts are a side quest, but really, things have only gone downhill since Adler Lake. Maybe their nodes are crap, but they aren’t delivering in design either. AMDs zen strategy has paid off massively, as it sets them up for major gains in the data center space—and that’s another place where Intels offering just can’t compete.

 

[Verpal]

10%

Wow, Samsung, you know what, I have been treating you guys too harsh, even SMIC ''7nm'' likely have better yield than this lmao

 

[AnotherReader]

Personally, I think their P+E approach is just adding to the problems. It adds even more complexity that can hamper performance, and when that occurs, you end up with wasted energy. I’m still not convinced that P+E has a practical use case in high-performance computing. Apple seemingly makes it work, but we really don’t know how they go about it or understand the differences between their P and E cores. Even then, they don’t pile on the E cores in their high end chips, but instead reduce E cores and add P cores. Sure, there are benchmarks that show P+E works, but as a daily user of such a chip, I can tell you the day-to-day experience leaves much to be desired.

Intel has gotten stingy with P cores since Comet Lake. It would be nice to see them do their own chiplet+IO die approach to get more P cores in our hands, or maybe use Tiles for that somehow.

It might seem like my thoughts are a side quest, but really, things have only gone downhill since Adler Lake. Maybe their nodes are crap, but they aren’t delivering in design either. AMDs zen strategy has paid off massively, as it sets them up for major gains in the data center space—and that’s another place where Intels offering just can’t compete.

Their P core design is definitely inferior to Zen 5 when you consider that it is a larger core on a more advanced process. Zen 5 manages to be smaller even after paying the area cost of full fat AVX-512 capability. Intel's process leadership has saved the design team's bacon in the past (Pentium 4 Northwood), but this time even using a more advanced process than AMD isn't enough.

 

[bug]

Even 14 nm had issues and caused shipments of Broadwell to be delayed by a quarter. Of course, this was nothing compared to the issues affecting Intel 7, which was a debacle until they finally fixed it by the time Tiger Lake rolled out. As for 18A, a defect density of around 0.4 suggests that it would take them another year to reach yields appropriate for mass production. This 10% figure is for Broadcom's chips which include monsters rivaling Nvidia's datacenter offerings in die size. A 10% yield for such a chip isn't catastrophic at this stage.

Tbh, a delay by a quarter basically means spot-on. But there were some difficulties around 14nm, as you stated. They caused Intel to release the mobile chips first, which was not their usual MO back then.

 

[Chrispy_]

Even 14 nm had issues and caused shipments of Broadwell to be delayed by a quarter. Of course, this was nothing compared to the issues affecting Intel 7, which was a debacle until they finally fixed it by the time Tiger Lake rolled out. As for 18A, a defect density of around 0.4 suggests that it would take them another year to reach yields appropriate for mass production. This 10% figure is for Broadcom's chips which include monsters rivaling Nvidia's datacenter offerings in die size. A 10% yield for such a chip isn't catastrophic at this stage.

Ah, okay - I didn't spot that it was for monster dies, I assumed it was for Intel CPUs.

 

[AnotherReader]

Ah, okay - I didn't spot that it was for monster dies, I assumed it was for Intel CPUs.

The source isn't clear on that part, but given that all of the hoopla involved Broadcom, it's a reasonable assumption. The translated source says:

The industry analyzed that the yield of the 18 Angstrom (equivalent to 1.8 nanometers) process that Intel was planning to mass produce next year was less than 10%. As a result, its customer Broadcom canceled its semiconductor orders for Intel

Tbh, a delay by a quarter basically means spot-on. But there were some difficulties around 14nm, as you stated. They caused Intel to release the mobile chips first, which was not their usual MO back then.

Yeah, a quarter's delay is a nothingburger, but it was a harbinger of things to come. Also note the low clock speeds that prevented Broadwell from replacing Haswell on the desktop.

 

[trparky]

Yield is highly relative metric. For small chips it can be 80%

This is where AMD's chiplet design is showing success. Smaller chips, chiplets, are much easier to make with less defects.

Apple seemingly makes it work, but we really don’t know how they go about it or understand the differences between their P and E cores.

That's mainly because of Apple's vertical integration. They own the hardware and the software; they can marry them together in ways no one else can do.

Sure, there are benchmarks that show P+E works, but as a daily user of such a chip, I can tell you the day-to-day experience leaves much to be desired.

Yeah, I have a notebook with an Intel chip in it and it just sucks performance wise.

 

[Darmok N Jalad]

Yeah, I have a notebook with an Intel chip in it and it just sucks performance wise.

That’s my experience as well. It’s an i7 in name only (just 2 P cores!), it quite regularly ends up with scheduling issues and delays in random heavy workloads. I think some of the P+E issues come down to complexities that Windows must handle, and MS hasn’t exactly been hitting it out of the park either. MS might be half the problem (or more). As you say, Apple has tight control on both components, and they also have considerably more experience with P+E since it’s been a feature of iPhones and iPads for many years.

 

[trparky]

it quite regularly ends up with scheduling issues and delays in random heavy workloads.

Remember when Intel said that thread scheduling wouldn't be a problem thanks to something called Intel Thread Director?

Pepperidge Farm remembers.

 

[LittleBro]

Holy shit, this is bad. I expected at least twice the amount that Samsung has. This means that the rumors about Intel reserving part of TSMC's 2N capacity for next years was true. You can't make foundry with just technology. They though buying most modern machines will get the job done. That's not how it works.

Still waiting on Intel to fulfill that claim about their 18A being the best in class process that will make every one wet and desperately horny for Intel foundry. Patty said this will be in H12025. There's still time ... Or not, Patty? Better leave sooner than never.



But hey, people, Intel 14A is just around the corner and Intel will deliver, trust me! Why spending more resources on 18A, let's just cancel it and focus on 14A as they did with 20A.

 

[Darmok N Jalad]

Remember when Intel said that thread scheduling wouldn't be a problem thanks to something called Intel Thread Director?

Pepperidge Farm remembers.

I kinda wonder if this is one of the reasons they dropped SMT. One more layer of complexity. There’s nothing like opening Task Manager on my i7 and seeing 2 physical cores at 100% while the other 10 “cores” are twiddling their thumbs while system responsiveness falls off.

 

[igormp]

Remember when Intel said that thread scheduling wouldn't be a problem thanks to something called Intel Thread Director?

Pepperidge Farm remembers.

Funnily enough, those things seem to just werk on linux (not that surprising given how big.LITTLE has been a thing in phones for ages).
The thread director barely brings any benefit, and even AMD hasn't had the same issues that they had on windows with core parking and whatnot.

Sure, a CPU company should work with the vendor of the OS their CPUs are going to be mostly used with in the consumer space to make things work fine, but given how both companies have had their fair share of issues, I really wonder how bad Window's scheduler is.

I kinda wonder if this is one of the reasons they dropped SMT. One more layer of complexity. There’s nothing like opening Task Manager on my i7 and seeing 2 physical cores at 100% while the other 10 “cores” are twiddling their thumbs while system responsiveness falls off.

Now imagine Meteor Lake, which had E-cores in a low power island, E-cores in the main compute tile, P-cores, and its SMT threads. 4 levels of different logical cores, fun

 

[Darmok N Jalad]

Now imagine Meteor Lake, which had E-cores in a low power island, E-cores in the main compute tile, P-cores, and its SMT threads. 4 levels of different logical cores, fun

Yeah, it certainly doesn’t feel like throwing even more complexity at the problem is the answer. They will probably make great gains in always-connected battery life, while every other thing that matters regresses.

 

[trparky]

I kinda wonder if this is one of the reasons they dropped SMT.

Intel's implementation of SMT has always been rather inefficient, especially when compared to that of AMD's implementation.

AMD hasn't had the same issues that they had on windows with core parking and whatnot.

Are you saying that AMD has never had this issue?