Need advice to achieve 1:1 ratio between Conroe and DDR2 750

[reckon]

Hello,

This is what I just read at wikipedia.org

Unlike the previous Pentium 4 and Pentium D design, the Core 2 technology sees a greater benefit from memory running synchronous with the Front Side Bus (FSB). This means that for the Conroe CPUs with FSB of 1066Mhz (4x266Mhz) the ideal memory speed is PC4200. Using PC5300 actually decreases performance, only when going to PC6400 there is again a performance increase to be seen.

If this assertion is true, I think I made a bad election when choosing my DDR 2 memory. I got a 2Gb Kit from Kingston HyperX Dual Channel that works at 750Mhz.

Now I'm just wondering how to achieve the 1:1 ratio to get the most of my current system. I have several ideas, but I don't know which one may be the best and which one would harm less the components.

Please help me. Need advice from advanced/expertise users.

My mobo it's a Gigabyte GA-965P-DQ6 (F2 Bios).

1. Try to rise the FSB up to 375Mhz and get the 1:1 ratio.
2. Try to reduce the DDR 2 modules speed to 266Mhz (if it's possible)
3. An intermediate solution: rise FSB up to 333 and try to reduce memory speed to 333.

In any of the cases I don't know if I do have to change the Vcore or any other voltage.

Thanks in advance for everything

 

[jaffers]

Hello,

This is what I just read at wikipedia.org


If this assertion is true, I think I made a bad election when choosing my DDR 2 memory. I got a 2Gb Kit from Kingston HyperX Dual Channel that works at 750Mhz.

Now I'm just wondering how to achieve the 1:1 ratio to get the most of my current system. I have several ideas, but I don't know which one may be the best and which one would harm less the components.

Please help me. Need advice from advanced/expertise users.

My mobo it's a Gigabyte GA-965P-DQ6 (F2 Bios).

1. Try to rise the FSB up to 375Mhz and get the 1:1 ratio.
2. Try to reduce the DDR 2 modules speed to 266Mhz (if it's possible)
3. An intermediate solution: rise FSB up to 333 and try to reduce memory speed to 333.

In any of the cases I don't know if I do have to change the Vcore or any other voltage.

Thanks in advance for everything

Hi, I do not have any experience with Gigabyte MB. But the dynamics are the same for OC and the actual may be slightly different from MB to MB vendor.

1. You begin by the base of FSB that determine CPU CLK by multiplier
2. Base FSB x 4 is your final FSB to CPU
3. Memory usually is ratio based with 1.66 max.

With intel 965P chipset in your MB remember it is new fast memory achitecture from Intel. It optimizes memory to L2 cache transfers. It performs most with lower latencies but not at the cost of general memory bandwidth. So your better bet is lower your memory say upto PC-5400 but reduce CL from 5 to 4 or better 4-4-4-12 4 if possible with your RAM. Not need to play with voltages unless your RAM breaks or your CPU hiccups.

I have 975X running D-940 @ 3.7G, FSB @ 920, and memory at 764M @ 4-4-4-12 4 (Corsair XMS2 rated at PC-6400 (800Mhz) with 5-5-5-15 5) with no voltage change. If I increase and make FSB-MEM at 1:1 the bandwidth slightly increase but the memory performace decreases as seen by the CPU. Because, it sees through cache and latencies play their part here. Bottom line in my case is my memory is running at slower speed then rated but with fewer clocks and this is the difference. It see that in real-time with Vegas or other endoing jobs I use as well as in standard benchmarks

You already have an idea. Try to implement my approach and you would see a CPU that never waits for data.

 

[reckon]

Hello and thanks for the reply.

So you think the best may be reduce my DDR2 to 667?

I'll try and I'll post back the results.

Best regards

 

[jaffers]

Hello and thanks for the reply.

So you think the best may be reduce my DDR2 to 667?

I'll try and I'll post back the results.

Best regards

Well not exactly but it may be 667MHz as well. It should be in the near about where you can reduce your number of clock cycles by one safely. Calculate your total write strobe time or read latch time by:

f=1/T where f=frequency and T=time.

Look for the clock time in "ns" you gained by reducing the frequency and therby reducing the clock cycles from 5 to 4. It should show improvement hence better cache performance to CPU.

Regards

 

[Sasqui]

I'd like to see some benchmark results to confirm that statement in Wikki. Since the memory contoller hub is in the northbridge, it would probably also depend on the chipset (975 or 965) - wouldn't one think.

You could run SiSoft read/write numbers with different memory dividers just to see shear bandwidth numbers.

Jaffers - I didn't read your post before posting mine, good info.

 

[jaffers]

I'd like to see some benchmark results to confirm that statement in Wikki. Since the memory contoller hub is in the northbridge, it would probably also depend on the chipset (975 or 965) - wouldn't one think.

You could run SiSoft read/write numbers with different memory dividers just to see shear bandwidth numbers.

Jaffers - I didn't read your post before posting mine, good info.

Thanks Sasqui. I do think what is posted at Wikki is not correct. The only catch with these latest uPs is that the memory cache should hit all the time. This never happens. Then it is filled better with lower CAS latency RAM offcourse. CAS latencies can be more changable with higher freq. rated RAM. Thus PC-4200 is better than PC-5300 statement is not right. Because you can tune PC-5300 more than PC-4200 to suit one's requirement (not only freq, but CLK cycles and then voltages as well)

Now even PC-8000 is available that gives you liberty to tune FSB:RAM = 1:1. umm.

 

[Sasqui]

Thus PC-4200 is better than PC-5300 statement is not right. QUOTE]

In general, I totally agree, in some cases I think that might not be true, such as where the timings on high qulaity 4200 Ram are far better than the low quality 5300 rated Ram. But that's splitting hairs.

I do not profess to be a RAM timing expert even being a seasoned overclocker - I was actually messing with mine (DDR) last night to learn more about it, but decided sleep was more important.