PC DDR6 Memory to Offer 10-times the Bandwidth of DDR4: Synopsys

[TheinsanegamerN]

DDR3 is dual channel (as is DDR4/5). DDR6 is quad-channel. Double again your calculated bandwidth and you get the correct figure.

Bits matter, not channels. DDR5 is "quad channel" if you have 2 sticks. DDR6 will be "quad channel" in a single stick. But it's still 64 total bits per stick and 2 main channels from the CPU with A/B slots meaning a max of 128 bit, the same since DDR1 came out. DDR6 could be 64 "channel" with each bit being separate and it would make no difference.

I think you are doing a great job. 2133 is the max limit for Sandy Bridge. Never seen any chip even on hwbot able to run 2400 apart from Sandy Bridge-E. I myself was running two sticks of single rank 2x4GB 2133 9-11-10-27-1T with 2600k @ 4.8Ghz. But I never think that the IMC is able to push 4 sticks of dual ranks memory to 2133.

2133 is what my ivy bridge setup runs. It was blazing fast at the time. Ahh the memories.

 

[R0H1T]

Damn 4 years and they are done with ddr5, if I had known I could have skipped an entire memory generation

Spoiler

DDR6 will follow LPDDR6 & won't come to mainstream probably at least two years from now!

 

[JWNoctis]

Strange indeed, and ECC isn't mentioned. What's a CPU supposed to do with 1.5 byte units when the smallest unit of transfer is 64 bytes, or one cache line?
Also ... Does LPDDR with ECC even exist?

It might very well need to be, to reach that kind of speed and frequency. DDR5 was already 32-bit/40-bit with ECC, further halving the channel width and and some sort of line code scheme would be a natural evolution. What that would do to latency, I don't know.

On the plus side, we might finally get octa-channel memory controllers in consumer CPUs, for what good it will do without actual bit width increase, when it finally comes.

 

[Darkmont]

Strange indeed, and ECC isn't mentioned. What's a CPU supposed to do with 1.5 byte units when the smallest unit of transfer is 64 bytes, or one cache line?
Also ... Does LPDDR with ECC even exist?


Yeah but what flavour of "G" is that? When describing data rates, mega/giga/tera is always, universally, decimal (powers of 1000), not binary (powers of 1024). Your M here is 1,000,000 but your G is 1,024,000,000.

ECC is mentioned. Data bits + Metadata bits

 

[londiste]

Yeah but what flavour of "G" is that? When describing data rates, mega/giga/tera is always, universally, decimal (powers of 1000), not binary (powers of 1024). Your M here is 1,000,000 but your G is 1,024,000,000.

Ha, you are right. While I think using binary for these data rates makes more sense this is probably of an example why we'd want to use decimal units. I indeed did mess up myself with the M there. MT is 10-based thus the rest of the M need to be 10-based and I automatically went to GiB/s there.

Why 12/24-bit channels? 8b or 16b encoded and with ECC?

The same deal as DDR5 I suppose. DDR5 has two 40b channels, integrated ECC or whatnot and these are in the end still 2x32b channels. DDR6 seems to be doing four 24b channels - in the end 4x16b.

 

[stimpy88]

The numeric figure in the spec indicates MT/s, (transfers) not bandwidth. DDR3-2133 is 17GB/sec, whereas DDR6-8000 is, if I calculate correctly, 134 GB/sec.

You get that kind of bandwidth (over 130GBs) on well-tuned DDR5 8000 right now. And isn't DDR5 8600 an official JDEC standard?

 

[tpu7887]

I think you are doing a great job. 2133 is the max limit for Sandy Bridge. Never seen any chip even on hwbot able to run 2400 apart from Sandy Bridge-E. I myself was running two sticks of single rank 2x4GB 2133 9-11-10-27-1T with 2600k @ 4.8Ghz. But I never think that the IMC is able to push 4 sticks of dual ranks memory to 2133.

Thanks - I did all the secondary and tertiaries too. Missing from the below pic is write CAS latency, and it was seven. Command rate shown here is two, but this is an old picture. This picture is from when I had two sticks, and for some reason, with two sticks I could never get CR1. But when I got the second set, it worked! Because I could never get two sticks to run CR1, I never even tried with four - it took resetting the CMOS one day (about 6 months after installing the extra sticks...), booting into the BIOS, OC'ing to 2133, and then forgetting to go to the timings page before rebooting lol.

24 could be set as low as 18, but some RAM benchmarks were affected. There were no differences between 20 and 28, so I settled on 24 lol.

The machine is still surprisingly good.. CPUz's CPU benchmark ties it with a stock 7600K (@4.4GHz?), SuperPi 1M is somewhere in the high 7 seconds if memory serves. Except for TPM 2.0 compatibility, games designed for >4 cores, modern games with high end NV 2000 series cards @ 1080p, and other really heavily multithreaded things, you'd never know this system was coming up on 15 years old! Heck, the only reason I can tell the difference between it and my 9600K @ 5.2GHz with DDR4 3900 14:15:15 CR1 when I click the start button, is that both machines are connected to the same 280Hz monitor. If it was 120, that latency difference - the time between left clicking the windows icon and the start menu appearing - would be imperceptible! lol

I really like it when hardware lasts. I'm hoping Meteor Lake and the coming desktop variant will be the same. And that my 5800X3D and 3080 will continue doing me well for games... We'll see!