Tuesday, May 31st 2022
AMD Zen 4 & Socket AM5 Explained: PCIe Lanes, Chipsets, Connectivity
There has been a fair bit of confusion about AMD's upcoming AM5 platform when it comes to connectivity and we're going to break things down and explain what the difference is between the B650 and X670 boards. We're also going to cover the processor connectivity, since that's an integral part of any motherboard these days. All the information in this article is based on what we've been told by various sources during Computex.
Connectivity from the Processor
Starting with the Zen 4 processor's lanes, all of its PCIe lanes are PCIe 5.0 and there are a total of 28 lanes. The first 16 PCI Express lanes will be used for a single x16 PCIe slot, or they can be split into two x8 slots. AMD's requirements only enforce PCIe 5.0 on the X670E boards, which means PCIe 4.0 will be applicable to lower cost motherboards.
The new Zen 4 Ryzen processors will have eight general purpose lanes, of which at least four will be required to be dedicated to an M.2 storage slot (always Gen 5). The other four lanes are up to the motherboard manufacturers. Some boards will use these to implement Thunderbolt 4 (Intel Maple Ridge JHL8540) or USB4 (ASMedia ASM4242). If none of these options are used, these lanes can go towards an additional M.2 slot.
With integrated graphics becoming standard on Zen 4, the first generation of AM5 processors will offer four dedicated display outputs, with HDMI 2.1 and DisplayPort 2.0 being supported, but neither being required as far as we understand. There are also four USB 3.2 Gen 2 (10 Gbps) ports and at least one USB 2.0 port coming from the processor. Three of the USB 3.2 ports also support DP Alt Mode, something we've seen several announced boards supporting on at least one USB-C port. This seems to be up to the motherboard manufacturers to implement once again.
The remaining four PCIe lanes are used for connecting to the chipset. Just to clarify, on the processor side these do support PCI-Express 5.0, the chipset only supports PCIe 4.0, so the link negotiation mechanism will downgrade the link to Gen 4.
Chipset Connectivity
The way AMD presented their AM5 chipset options at Computex, it seemed that these each is an independent designs, based on its own silicon. In reality AMD has partnered with ASMedia to create a single chipset, called "Promontory 21," which is used in various configurations. For the X670 and X670E they are daisy-chaining a pair of B650 chipsets together, for additional connectivity options.
Promontory 21 offers a total of 16 PCI-Express lanes. Four of these are used to connect to the CPU, over a Gen 4 interface, as mentioned before. In the X670/X670E daisy-chained configuration the secondary chipset connects to the primary chipset, it has no direct link to the processor. This means that on the primary chipset another four lanes are used up, leaving eight usable PCIe lanes, whereas the secondary chipset has 12 usable PCIe lanes. Four of the lanes are PCIe 3.0, although these are muxed interfaces with SATA 6 Gbps. This allows the motherboard manufacturers to choose how they want to implement those interfaces and as we've seen, ASRock has gone for eight SATA ports, whereas most other board makers appear to be going for six on their X670 and X670E motherboards.
In other words, B650 motherboards will have a total of eight usable PCIe 4.0 lanes and four PCIe 3.0 or SATA 6 Gbps interfaces. X670 and X670E motherboards will have 12 PCIe 4.0 lanes and up to eight PCIe 3.0 or SATA 6 Gbps interfaces. In addition to this, each chipset will have six USB 3.2 Gen 2 (10 Gbps) interfaces, where the first two can be combined into a single USB 3.2 Gen 2x2 (20 Gbps) interface. This means X670 and X670E boards can have a total of 16 USB 3.2 Gen 2 (10 Gbps) ports, or two USB 3.2 Gen 2x2 (20 Gbps) ports and 12 USB 3.2 Gen 2 (10 Gbps) ports, including the USB 3.2 Gen 2 (10 Gbps) ports from the processor. Finally there's support for up to six USB 2.0 ports from the chipset. As a side note, any motherboard with more than two USB 3.2 Gen 2x2 (20 Gbps) ports, will be using a third party host controller or a hub.
Compared to Intel Alder Lake
Compared to Intel's Z690 chipset, which has support for a total of 28 PCIe lanes, AMD has clearly decided to scale things back a little bit. In all fairness, Intel doesn't support more than 12 PCIe 4.0 lanes from the Z690 chipset and four of those lanes are shared with SATA 6 Gbps ports. Intel wins by having support for an additional 12 PCIe 3.0 lanes though, but two of those are shared with an Ethernet MAC, something AMD doesn't do, as the company relies on PCIe based Ethernet controllers. It's worth noting that Intel has a wider bus to some of its chipsets, as their CPUs support eight DMI 4.0 lanes. Comparing AMD's B650 chipset with Intel's B660, AMD comes out slightly ahead if high-speed interfaces matter, as the B660 chipset only supports six PCIe 4.0 lanes and eight PCIe 3.0 lanes, although none of its four SATA 6 Gbps ports are shared with PCIe.
The Z690 chipset supports a total of 10 USB 3.2 Gen 2 (10 Gbps) interfaces, but as with AMD, two interfaces are combined to create a single 20 Gbps interface, which means up to four USB 3.2 Gen 2x2 (20 Gbps) ports are supported. The B660 chipset supports two USB 3.2 Gen 2x2 (20 Gbps) plus two USB 3.2 Gen 1 (10 Gbps) ports, or six 10 Gbps ports. That said, Intel doesn't have any USB ports inside the CPU, which makes this something of a draw, depending on how the motherboard makers implement the connectivity options on their motherboards.
What we obviously don't know at this point is how much of a performance penalty there will be for AMD having two chipsets, especially when it comes to high-speed storage devices. We've seen some concerns about this implementation in virtualized environments and how these devices will appear to the OS in such a case, but we don't share those concerns. We expect the primary chipset to appear as PCIe bridge to the host system, a mechanism that is part of the specification and has been supported and used for many years. These are things we're going to have to wait and see how they play out, but AMD clearly deemed the tradeoffs reasonable enough versus the cost of developing multiple different chipsets.
Starting with the Zen 4 processor's lanes, all of its PCIe lanes are PCIe 5.0 and there are a total of 28 lanes. The first 16 PCI Express lanes will be used for a single x16 PCIe slot, or they can be split into two x8 slots. AMD's requirements only enforce PCIe 5.0 on the X670E boards, which means PCIe 4.0 will be applicable to lower cost motherboards.
With integrated graphics becoming standard on Zen 4, the first generation of AM5 processors will offer four dedicated display outputs, with HDMI 2.1 and DisplayPort 2.0 being supported, but neither being required as far as we understand. There are also four USB 3.2 Gen 2 (10 Gbps) ports and at least one USB 2.0 port coming from the processor. Three of the USB 3.2 ports also support DP Alt Mode, something we've seen several announced boards supporting on at least one USB-C port. This seems to be up to the motherboard manufacturers to implement once again.
The remaining four PCIe lanes are used for connecting to the chipset. Just to clarify, on the processor side these do support PCI-Express 5.0, the chipset only supports PCIe 4.0, so the link negotiation mechanism will downgrade the link to Gen 4.
Chipset Connectivity
The way AMD presented their AM5 chipset options at Computex, it seemed that these each is an independent designs, based on its own silicon. In reality AMD has partnered with ASMedia to create a single chipset, called "Promontory 21," which is used in various configurations. For the X670 and X670E they are daisy-chaining a pair of B650 chipsets together, for additional connectivity options.
In other words, B650 motherboards will have a total of eight usable PCIe 4.0 lanes and four PCIe 3.0 or SATA 6 Gbps interfaces. X670 and X670E motherboards will have 12 PCIe 4.0 lanes and up to eight PCIe 3.0 or SATA 6 Gbps interfaces. In addition to this, each chipset will have six USB 3.2 Gen 2 (10 Gbps) interfaces, where the first two can be combined into a single USB 3.2 Gen 2x2 (20 Gbps) interface. This means X670 and X670E boards can have a total of 16 USB 3.2 Gen 2 (10 Gbps) ports, or two USB 3.2 Gen 2x2 (20 Gbps) ports and 12 USB 3.2 Gen 2 (10 Gbps) ports, including the USB 3.2 Gen 2 (10 Gbps) ports from the processor. Finally there's support for up to six USB 2.0 ports from the chipset. As a side note, any motherboard with more than two USB 3.2 Gen 2x2 (20 Gbps) ports, will be using a third party host controller or a hub.
Compared to Intel Alder Lake
The Z690 chipset supports a total of 10 USB 3.2 Gen 2 (10 Gbps) interfaces, but as with AMD, two interfaces are combined to create a single 20 Gbps interface, which means up to four USB 3.2 Gen 2x2 (20 Gbps) ports are supported. The B660 chipset supports two USB 3.2 Gen 2x2 (20 Gbps) plus two USB 3.2 Gen 1 (10 Gbps) ports, or six 10 Gbps ports. That said, Intel doesn't have any USB ports inside the CPU, which makes this something of a draw, depending on how the motherboard makers implement the connectivity options on their motherboards.
What we obviously don't know at this point is how much of a performance penalty there will be for AMD having two chipsets, especially when it comes to high-speed storage devices. We've seen some concerns about this implementation in virtualized environments and how these devices will appear to the OS in such a case, but we don't share those concerns. We expect the primary chipset to appear as PCIe bridge to the host system, a mechanism that is part of the specification and has been supported and used for many years. These are things we're going to have to wait and see how they play out, but AMD clearly deemed the tradeoffs reasonable enough versus the cost of developing multiple different chipsets.
86 Comments on AMD Zen 4 & Socket AM5 Explained: PCIe Lanes, Chipsets, Connectivity
1 x PCIE 5.0x16
2 x PCIE 5.0 x4 m.2
3 x PCIE 4.0 x4 PCIE slots
Just don't make more than 2 m.2 slots and give me regular PCIE slots
Btw
Since CPU gives 5.0x4 to chipset and one B650 only takes half of it
Why not make the 2 B650 chipsets parallel ?
Swede, were there any Realtek booths at Computex? RTL8261N and RTL8157/RTL8126/RTL8251B specs? Are those gen4?
The only chip I know of so far, with a single PCIe 4.0 lane as interface, is a version of the Marvell ACQ113 10 Gbps chip and the derivatives of it.
Not sure why a 2.5 Gbps controller would need PCIe support. Most boards are using the muxed PCIe 3.0/SATA lanes for things like that.
The RTL8261N is just a PHY and AMD doesn't have integrated MACs in their desktop CPUs. In fact, I think they only have that in their embedded parts.
32 PCIE lanes would have been more forward looking at the start of a 5+ year platform.
Each chipset having a separate, direct link to CPU seems to have much more sense.
So they went all pcie5.0 but limited the chipset to pcie4.0? Gen5 is a meme anyway for now but it would seem chipset would be the useful place for it since it has to multiplex several different things.
Looks to me like B650 will be the one to get (maybe B650E with "all" gen5 for dem future profing?)Because you can't split lanes, chipset uses x4 lanes at half the available bandwith. I don't know that much about pcie but an x2 chipset seems like a bad idea even on gen5 (too few lanes for multiplexing stuff maybe?)I doubt it will be any more popular on the desktop than thunderbolt ever was. In any case, the CPU supports gen5 lanes so when better controllers become available that still goes pretty far (40gbps was 4x gen3 so with controller capable of doing pcie switching that's a couple ports)
Not sure if it'll be possible to do a straight swap and go from USB 3.2 10 Gbps to USB4 at 40 Gbps, but it might be something they'll do in a future CPU.
So I was right - no native USB4 from this platform. That is seriously disappointing considering Tiger and Alder Lake has it baked in. The biggest benefit of USB4 (apart from bandwidth) is that there's none of the "does this USB-C port support DP alt mode" nonsense, because all USB4 ports have to support DP alt mode.
... and there we have it, up to four USB 3.2 gen 2 ports, but DP alt mode is optional and one of them arbitrarily doesn't support DP alt mode at all. WHHHHHYYYYYY? It also seems like these ports cannot be bonded to 3.2 gen 2x2, again why?
Are the up-to-4 display outputs muxed with the up-to-3 USB 3.2 gen 2s with DP alt mode? In other word, could you have 7 displays being driven by the CPU, or is 4 the hard limit?
Chipset
I like the option to have zero SATA ports in favour of an extra NVMe drive, even if it's only PCIe 3.0.
The daisy-chained chipsets are a terrible kludge that will be a nightmare in terms of latency for devices hanging off the most downstream one. Also, what happens if one of the chipsets fails? Does the other continue to work and the board behaves like a B650? Or is it just a dead board?
Why can only the first two 3.2 gen 2 ports be bonded to 3.2 gen 2x2?
Platform overall
I honestly don't understand why AMD is launching a platform that is not natively USB4-capable... if I was wearing my conspiracy theorist hat I'd say it's to allow ASMedia to sell USB4 chips separately and thus make more money. Considering Intel has had platform-native USB4 since Tiger Lake in 2020, this makes the AM5 platform look dated before it's even launched. The chipsets' low PCIe lane count (not bandwidth) compared to ADL, is a further concern.
As such, AM5 is of no interest to me right now. I was already planning to stay on AM4 until Zen 4's successor arrived with all the bugs fixed, but native USB4 was the variable that had the potential to sway me... no native USB4, no reason to upgrade.But there likely aren't going to be many mATX/ITX X670/X670E boards, which is a slap in the face to the SFF crowd who want to build high-end systems in small spaces.
All it tells me is x670 will not be a very interesting platform when "x770" or whatever it ends up called will be a bigger upgrade and avoid the possible mess of dual chipsets (at least it will be more mature by then)
I've obviously verified this.
In fact, we're not the first publication to cover the chipset layout, we just did in a slightly different way, as the site linked to below, made some slightly flawed assumptions based on expected board layouts, which won't always be the case.
www.angstronomics.com/p/site-launch-exclusive-all-the-juicy
It's also possible that ASMedia weren't ready for PCIe 5.0 and based on the USB4 article from a couple of weeks ago, they've only just taped out their first PCIe 5.0 devices, whatever that might be.
As far as I'm aware, there are no bridges that can convert between different PCIe versions, so you'd need a full 12-port PCIe 5.0 switch to do what you're suggesting. That would add a lot of cost. So far only Microchip and Broadcom seems to have PCIe 5.0 switches and neither company is providing any pricing.
Microchip doesn't do anything with less than 28 lanes and a PCIe 4.0 bridge with 28 lanes is $207.92, admittedly in a quantity of one, but even in larger quantities, it would be over $100.
No, the link from the CPU to the chipset really does appear to be four lanes of PCIe 4.0. Nothing I've been told or seen indicates it would be PCIe 5.0.
And no, not all USB4 ports have to support DP Alt Mode, the requirement is only for one display output, whereas Thunderbolt has to support two, both standards call for 4K output.
Native USB4 is an arbitrary self definition. AM5 motherboards can have USB4. There can’t be a one off exception to a standard. If the motherboard manufacturer puts a USB4 port or more on the motherboard (which the CPU allows) then its USB4. Why create frustration for yourself?
PS. You'll loose the USB4/TB4 as you'll use the x4 lanes dedicated to this for the second PCIe 5.0 M.2.
@TheLostSwede : any possibility of an "A620" chip-less set?Already answered