Saturday, December 20th 2008
AMD Propus and Regor Die Sizes Surface?
The years 2007 and 2008 have been quite tough for AMD when it came to client CPU market. Its Barcelona K10 "Stars" micro-architecture, while not being able to lead Intel technologically, eventually got implemented into various processor SKUs. AMD carved several triple-core and dual-core processors out of a standard K10 die design by changing the count of available processing cores.
With the upcoming 45nm Phenom II and Athlon series, AMD is planning two primary die designs: those with the L3 cache, and those without. Sources suggest that AMD won't be carving out dual-core chips by disabling two cores from a quad-core die (for the Regor core). This is indicated by the estimated die sizes of some of the 45nm AMD desktop cores according to Macadamia from XtremeSystems. The Deneb core is sized at 243 sq. mm, with 140 sq. mm for the Propus core, followed by ~80 sq. mm for Regor. The die-size difference between the Deneb and Propus cores comes from the fact that the former carries a large 6144 KB L3. A lot can be inferred from these die-sizes. Ideally for the smaller core (Propus), the L3 cache is physically lacking, and not merely present but disabled. This could result in the chip having a lesser energy draw. AMD has a string of product-launches in the first half of 2009, that includes the Propus core under the Athlon X4 banner.
Source:
XtremeSystems
With the upcoming 45nm Phenom II and Athlon series, AMD is planning two primary die designs: those with the L3 cache, and those without. Sources suggest that AMD won't be carving out dual-core chips by disabling two cores from a quad-core die (for the Regor core). This is indicated by the estimated die sizes of some of the 45nm AMD desktop cores according to Macadamia from XtremeSystems. The Deneb core is sized at 243 sq. mm, with 140 sq. mm for the Propus core, followed by ~80 sq. mm for Regor. The die-size difference between the Deneb and Propus cores comes from the fact that the former carries a large 6144 KB L3. A lot can be inferred from these die-sizes. Ideally for the smaller core (Propus), the L3 cache is physically lacking, and not merely present but disabled. This could result in the chip having a lesser energy draw. AMD has a string of product-launches in the first half of 2009, that includes the Propus core under the Athlon X4 banner.
13 Comments on AMD Propus and Regor Die Sizes Surface?
If AMD starts doing the same thing with Phenom II, AMD won't be competitive with Intel for at least another two years. They have to get those bugs fixed--have to. If it means starting over from scratch, then that is what they need to do. They can't keep building off a platform that is second-rate in performance and dismal in production yields. It will be the end of them if they believe they can.
Cacheless (as in constructed without the L3 in the first place) should be able to go faster because it is less complex. It should also be able to operate using less volts because the physical dimensions are smaller.
There is no starting from scratch. They have to stick with the plan. It just failed with phenom. AMD has to wait until bulldozer is ready. Everything works in parallel.