AVerMedia Technologies, a leading provider of audio and video solutions, is thrilled to unveil the AM350, the world's first USB condenser microphone custom-tuned by DIRAC. With its exclusive tuning technology and remarkable features, the AM350 sets a new standard in audio recording, empowering podcasters, vocal performers, singers, and other use cases to achieve exceptional sound quality and captivating performances.

The AM350 features high-sensitivity capsules and durable metal housing, allowing detailed audio capture and enhanced robustness. The AM350 also offers ultra-low noise performance and includes a built-in pop filter, ensuring clear and clean audio capture. Its plug-and-play USB interface makes it accessible for users of all levels, providing a professional recording experience without the need for additional equipment.

Today, Intel announced the release of its newest quantum research chip, Tunnel Falls, a 12-qubit silicon chip, and it is making the chip available to the quantum research community. In addition, Intel is collaborating with the Laboratory for Physical Sciences (LPS) at the University of Maryland, College Park's Qubit Collaboratory (LQC), a national-level Quantum Information Sciences (QIS) Research Center, to advance quantum computing research.

"Tunnel Falls is Intel's most advanced silicon spin qubit chip to date and draws upon the company's decades of transistor design and manufacturing expertise. The release of the new chip is the next step in Intel's long-term strategy to build a full-stack commercial quantum computing system. While there are still fundamental questions and challenges that must be solved along the path to a fault-tolerant quantum computer, the academic community can now explore this technology and accelerate research development."—Jim Clarke, director of Quantum Hardware, Intel

Samsung has invested heavily in semiconductor manufacturing technology to provide clients with a viable alternative to TSMC and its portfolio of nodes spanning anything from mobile to high-performance computing (HPC) applications. Today, we have information that Samsung will present its SF4X node to the public in this year's VLSI Symposium. Previously known as a 4HPC node, it is designed as a 4 nm-class node with a specialized use case for HPC processors, in contrast to the standard SF4 (4LPP) node that uses 4 nm transistors designed for low-power standards applicable to mobile/laptop space. According to the VLSI Symposium schedule, Samsung is set to present more info about the paper titled "Highly Reliable/Manufacturable 4nm FinFET Platform Technology (SF4X) for HPC Application with Dual-CPP/HP-HD Standard Cells."

As the brief introduction notes, "In this paper, the most upgraded 4nm (SF4X) ensuring HPC application was successfully demonstrated. Key features are (1) Significant performance +10% boosting with Power -23% reduction via advanced SD stress engineering, Transistor level DTCO (T-DTCO) and [middle-of-line] MOL scheme, (2) New HPC options: Ultra-Low-Vt device (ULVT), high speed SRAM and high Vdd operation guarantee with a newly developed MOL scheme. SF4X enhancement has been proved by a product to bring CPU Vmin reduction -60mV / IDDQ -10% variation reduction together with improved SRAM process margin. Moreover, to secure high Vdd operation, Contact-Gate breakdown voltage is improved by >1V without Performance degradation. This SF4X technology provides a tremendous performance benefits for various applications in a wide operation range." While we have no information on the reference for these claims, we suspect it is likely the regular SF4 node. More performance figures and an in-depth look will be available on Thursday, June 15, at Technology Session 16 at the symposium.

At VLSI Symposium 2023, scheduled to take place between June 11-16, Intel is set to demonstrate its PowerVia technology working efficiently on an E-Core chip built using the Intel 4 node. Conventional chips have power and signal interconnects distributed across multiple metal layers. PowerVia, on the other hand, dedicates specific layers for power delivery, effectively separating them from the signal routing layers. This approach allows for vertical power delivery through a set of power-specific Through-Silicon Vias (TSVs) or PowerVias, which are essentially vertical connections between the top and bottom surfaces of the chip. By delivering power directly from the backside of the chip, PowerVia reduces power supply noise and resistive losses, optimizing power distribution and improving overall energy efficiency. PowerVia is set to make a debut in 2024 with Intel 20A node.

For VLSI Symposium 2023 talk, the company has prepared a paper that highlights a design made using Intel 4 technology and implements E-Cores only in a test chip. The document states: "PowerVia Technology is a novel innovation to extend Process Scaling by having Power Delivery on the backside. This paper presents the pre and post silicon findings from implementing an Intel E-Core in PowerVia Technology. PowerVia enabled standard cell utilization of greater than 90 percent in large areas of the core while showing greater than 5 percent frequency benefit in silicon due reduced IR drop. Successful Post silicon debug is demonstrated with slightly higher but acceptable throughput times. The thermal characteristics of the PowerVia testchip is inline with higher power densities expected from logic scaling."

GlobalFoundries (GF) today sued IBM for trade secret misappropriation. The complaint asserts the former semiconductor manufacturing company has unlawfully disclosed GF's confidential IP and trade secrets, after IBM sold its microelectronics business to GF in 2015. The technology at issue was collaboratively developed, over decades, by the companies in Albany, New York and the sole and exclusive right to license and disclose that technology was transferred to GF upon the sale.

In the legal action filed in federal court in the Southern District of New York, GF asserts that IBM unlawfully disclosed GF IP and trade secrets to IBM partners including Intel and Japan's Rapidus, a newly formed advanced logic foundry, and by doing so, IBM is unjustly receiving potentially hundreds of millions of dollars in licensing income and other benefits.

Samsung and LG are among an number of tech companies reportedly pushing for radical changes in the cinema viewing experience. In a piece published by the Hollywood Reporter last week, new behind-the-scenes information has come to light about an effort to replace the (some will say tried and true) traditional cinema theater projection system with LED walls. The vast majority of international theater chains rely on a front projection method (via a back of the booth), and very few locations have a more state-of-the-art LED display-based system in place. The Culver Theater (naturally located in Culver City, CA) is one of a hundred cinemas worldwide to possess a Samsung Onyx LED display - although the tech on show is said to be of an older standard. Industry insiders have been invited to attend demonstrations of a newer generation LED wall technology destined for cinemas in the future, and early impressions are purported to be mixed.

A cinema-based LED wall display functions in a similar way to how a modern LED-based flat screen TV works - although on a much greater massive scale - with particular benefits of the technology resulting in fantastic performance in terms of high dynamic range and peak brightness. The main downside of having a tightly packed array of large LED panels is the resultant heat output - critics of the technology state that it will be difficult to implement an adequate cooling system (through air conditioning) to tame the wall's temperature increasing properties. The power required to operate the LED panel array (plus required cooling solution) is said to be much higher than that of an old-fashioned projector's relatively modest draw from the electricity supply. An LED wall will also completely negate the traditional placement of loudspeakers behind a cinema's front-placed screen - and sound engineers will need to explore a different method of front audio channel output within the context of a next generation LED theater room.

or the fifth consecutive month, International Data Corporation (IDC) has lowered its 2023 forecast for worldwide IT spending as technology investments continue to show the impact of a weakening economy. In its new monthly forecast for worldwide IT spending growth, IDC projects overall growth this year in constant currency of 4.4% to $3.25 trillion. This is slightly down from 4.5% in the previous month's forecast and represents a swing from a 6.0% growth forecast in October 2022.

"Since the fourth quarter of last year, we have seen clear and measurable signs of a moderate pullback in some areas of IT spending," said Stephen Minton, vice president in IDC's Data & Analytics research group. "Tech spending remains resilient compared to historical economic downturns and other types of business spending, but rising interest rates are now impacting capital spending."

In an interview with The Guardian, NVIDIA's Chief Technical Officer (CTO) Michael Kagan added his remarks on the company and its cryptocurrency position. Being the maker of the world's most powerful graphics cards and compute accelerators, NVIDIA is the most prominent player in the industry regarding any computing application from cryptocurrencies to AI and HPC. In the interview, Mr. Kegan expressed his opinions and argued that newly found applications such as ChatGTP bring much higher value to society compared to cryptocurrencies. "All this crypto stuff, it needed parallel processing, and [Nvidia] is the best, so people just programmed it to use for this purpose. They bought a lot of stuff, and then eventually it collapsed, because it doesn't bring anything useful for society. AI does," said Kegan, adding that "I never believed that [crypto] is something that will do something good for humanity. You know, people do crazy things, but they buy your stuff, you sell them stuff. But you don't redirect the company to support whatever it is."

When it comes to AI and other applications, the company has a very different position. "With ChatGPT, everybody can now create his own machine, his own programme: you just tell it what to do, and it will. And if it doesn't work the way you want it to, you tell it 'I want something different," he added, arguing that the new AI applications have usability level beyond that of crypto. Interestingly, trading applications are also familiar to NVIDIA, as they had clients (banks) using their hardware for faster trading execution. Mr. Kegan noted: "We were heavily involved in also trading: people on Wall Street were buying our stuff to save a few nanoseconds on the wire, the banks were doing crazy things like pulling the fibers under the Hudson taut to make them a little bit shorter, to save a few nanoseconds between their datacentre and the stock exchange."

The Biden-Harris Administration through the U.S. Department of Commerce's National Institute of Standards and Technology today launched the first CHIPS for America funding opportunity for manufacturing incentives to restore U.S. leadership in semiconductor manufacturing, support good-paying jobs across the semiconductor supply chain, and advance U.S. economic and national security.

As part of the bipartisan CHIPS and Science Act, the Department of Commerce is overseeing $50 billion to revitalize the U.S. semiconductor industry, including $39 billion in semiconductor incentives. The first funding opportunity seeks applications for projects to construct, expand, or modernize commercial facilities for the production of leading-edge, current-generation, and mature-node semiconductors. This includes both front-end wafer fabrication and back-end packaging. The Department will also be releasing a funding opportunity for semiconductor materials and equipment facilities in the late spring, and one for research and development facilities in the fall.

Marvell Technology, Inc., a leader in data infrastructure semiconductor solutions, announced today that it has selected Amazon Web Services, Inc. (AWS) as its cloud provider for electronic design automation (EDA). A cloud-first approach helps Marvell to rapidly and securely scale its service on the world's leading cloud, rise to the challenges brought by increasingly complex chip design processes, and deliver continuous innovation for the expanding needs across the automotive, carrier, data center, and enterprise infrastructure markets it serves. The work extends the longstanding relationship between the two companies—Marvell is also a key semiconductor supplier for AWS, helping the company support the design and rapid delivery of cloud services that best meet customers' demanding requirements.

EDA refers to the specialized and compute-intensive processes used in chip making and is a critical piece of Marvell's R&D. Over the years, the number of transistors on an integrated chip has increased exponentially. Each advance in chip design calls for a calculated application of software modules overseeing logic design, debugging, component placement, wire routing, optimization of time and power consumption, and verification. Due to the computationally intensive nature of EDA workloads, it is no longer cost-effective or timely to run EDA on premises. By powering its EDA with AWS, Marvell leverages an unmatched portfolio of services including secure, elastic, high-performance compute capacity in the cloud to solve challenges around speed, latency, security of IP, and data transfer.

NVIDIA today announced that company founder and CEO Jensen Huang will deliver the opening keynote at GTC 2023, covering the latest advancements in generative AI, the metaverse, large language models, robotics, cloud computing and more. More than 250,000 people are expected to register for the four-day event, which will include 650+ sessions from researchers, developers and industry leaders in virtually every computing domain. GTC will also feature a fireside chat with Huang and OpenAI co-founder Ilya Sutskever, plus talks by DeepMind's Demis Hassabis, Stability AI's Emad Mostaque and many others.

"This is the most extraordinary moment we have witnessed in the history of AI," Huang said. "New AI technologies and rapidly spreading adoption are transforming science and industry, and opening new frontiers for thousands of new companies. This will be our most important GTC yet."

Airvine, the first company to develop a multi-Gigabit-speed wireless backhaul system for indoor connectivity, today announced the general availability of its WaveTunnel product line. The shoebox-sized module mounts on ceilings and other interior high points to provide high speed connectivity for the ever-expanding menu of enterprise applications, whether IT (Information Tech) or OT (Operational Tech). WaveTunnel systems, which can be installed in hours, fill the broadband gap that exists within many large interior spaces by extending LAN reach or upgrading the performance of older 1 Gb/s Ethernet CAT 5 cables.

WaveTunnel operates in the interference-free 60 GHz band, where there is also plenty of spectrum to provide on first release a multi-Gb/s backbone connectivity capability. Typically, 60 GHz systems operate on a line-of-sight (LOS) basis. WaveTunnel, however, can penetrate most indoor walls as well as "beam steer" around corners, making it a true non-LOS 60 GHz system. This breakthrough capability greatly simplifies and expedites network set-up and operational readiness.

TSMC today held a 3 nanometer (3 nm) Volume Production and Capacity Expansion Ceremony at its Fab 18 new construction site in the Southern Taiwan Science Park (STSP), bringing together suppliers, construction partners, central and local government, the Taiwan Semiconductor Industry Association, and members of academia to witness an important milestone in the Company's advanced manufacturing.

TSMC has laid a strong foundation for 3 nm technology and capacity expansion, with Fab 18 located in the STSP serving as the Company's GIGAFAB facility producing 5 nm and 3 nm process technology. Today, TSMC announced that 3 nm technology has successfully entered volume production with good yields, and held a topping ceremony for its Fab 18 Phase 8 facility. TSMC estimates that 3 nm technology will create end products with a market value of US$1.5 trillion within five years of volume production.

TechPowerUp in partnership with Team Group are giving away six pieces of Team Group T-Force gaming hardware. We've actually been at this since November 14, and entries close tomorrow, November 25. That leaves you with a day to fill up a tiny form and answer a couple of quizzy questions on Team Group; for a chance to win a T-Force Delta RGB DDR5-6400 CL40 32 GB (2x 16 GB) memory kit, or one of five Vulcan Z 1 TB SSDs! The Delta RGB DDR5 would be a great addition to your next-generation desktop build, as its DDR5-6400 frequency goes great with the latest "Raptor Lake" and "Zen 4" processors! The Vulcan Z 1 TB makes for a decent game storage drive to add some room to your game library. Both look great when powered up and viewed through a tempered glass panel! Hurry up!

For more details, and to participate, visit this page. Entries close November 25 (tomorrow).

In what can only be called an unusual move, several Chinese fabless chip makers—such as Alibaba and Biren Technology—who manufacturers at TSMC, are looking at running their chips slower. The reason for this is that they're trying to circumvent the US sanctions against Chinese chip makers. It should be noted that these are chips that have already taped out and gone into sample production, such as Biren's BR100 GPU.As reported earlier today, Alibaba even had one of its chips delisted from the official SPEC ranking, due to being unavailable and it's possible that it's one of the chips that's affected by the US sanctions.

Considering that the Chinese chip makers are dependent on the same cutting edge nodes at TSMC as the likes of Nvidia, AMD, Qualcomm etc. it would potentially lead to more capacity for these companies at TSMC. According to the report by the Financial Times, Biren has had to stop shipments of its GPUs, as the company is going to have to prove that its chips don't violate the US export control restrictions. Apparently the rules to work out if a chip falls under the US sanctions or not are anything but clear. One metric is apparently based on the bidirectional transfer rate, which is capped at below 600 GB/s between chips, but the tricky part is that this metric can be calculated in several different ways. As such, Biren has dropped the transfer rate from 640 to 576 GB/s according to the Financial Times. The sanctions are likely to cause longer term concerns for TSMC as well, as the company is likely to lose several big customers for its cutting edge nodes, at least for the time being.

SEMI, the industry association serving the global electronics manufacturing and design supply chain, today announced that members of the new Semiconductor Climate Consortium (SCC) will discuss key aspects of the group's vision, goals and membership at two sessions during COP27 in Sharm El-Sheik, Egypt.

On Nov. 10 from 8:30am to 10:00am at Hotel Steigenberger Alcazar, the panel discussion SCC Collaboration for Solutions on Climate, with opening remarks by former U.S. Vice President Al Gore, will feature SCC founding members including ASM, ASMPT, Samsung Electronics and Schneider Electric discussing the importance of collaboration, transparency and reporting across the semiconductor value chain. Dr. Mousumi Bhat, Vice President of Sustainability Programs at SEMI, and Mark Patel, Senior Partner at McKinsey & Company, will also speak at the gathering.

In September, we reported that Apple, the world's most valuable company, would source some of its 3D NAND flash chips from the Chinese Yangtze Memory Technologies Corp (YMTC). However, according to the latest political pressure from the US government, Apple has reportedly canceled any contracts with the Chinese company and will not include their 3D NAND chips in the production of iPhones, iPads, and Mac computers. Even with YTMC's Xstacking 3.0 six-plane architecture that provides triple-level cell storage with I/O speeds of 2400 MT/s, Apple is not going to source any NAND Flash memory as US-China political relationship gets tighter regulations.

However, this could not be a deal breaker for both companies, as NAND Flash is in high demand, and new clients will emerge. As for Apple, the company has contracts with Kioxia, SK Hynix, Samsung, and possibly others that will ensure a steady supply of storage for the company's solutions.

As reported by BusinessKorea, Apple, one of the largest companies in the world, will source its 3D NAND from Chinese memory maker Yangtze Memory Technologies Corp (YMTC). Known for supplying 3D NAND to Chinese SSD makers, YTMC's reported contract with Apple will fuel the upcoming iPhone 14 SKU manufacturing. Whether or not this partnership will expand to other products, it is essential to have as many storage sources as possible, as Apple sells millions of devices per year. YTMC is on track to deliver 3D NAND flash with the latest Xstacking 3.0 six-plane architecture that provides triple-level cell storage with I/O speeds of 2400 MT/s.

YTMC has joined the list of 3D NAND flash vendors that Apple works with, including SK Hynix, Samsung, Kioxia, and possibly others. This partnership also highlights that the Chinese memory output is sufficient and significant enough to break into more markets worldwide, not remaining exclusive to domestic use.

Intel's upcoming Meteor Lake (MTL) processor is set to deliver a wide range of exciting solutions, with the first being the Intel 4 manufacturing node. However, today we have some interesting Linux kernel patches that indicate that Meteor Lake will have a dedicated "Standalone Media" Graphics Technology (GT) block to process video/audio. Moving encoding and decoding off GPU to a dedicated media engine will allow MTL to play back video without the GPU, and the GPU can be used as a parallel processing powerhouse. Features like Intel QuickSync will be built into this unit. What is interesting is that this unit will be made on a separate tile, which will be fused with the rest using tile-based manufacturing found in Ponte Vecchio (which has 47 tiles).

Intel Linux PatchesStarting with [Meteor Lake], media functionality has moved into a new, second GT at the hardware level. This new GT, referred to as "standalone media" in the spec, has its own GuC, power management/forcewake, etc. The general non-engine GT registers for standalone media start at 0x380000, but otherwise use the same MMIO offsets as the primary GT.

Standalone media has a lot of similarity to the remote tiles present on platforms like [Xe HP Software Development Vehicle] and [Ponte Vecchio], and our i915 [kernel graphics driver] implementation can share much of the general "multi GT" infrastructure between the two types of platforms.

Phison Electronics Corp., a global leader in NAND flash controller and storage solutions, today announced the launch of its X1 controller based solid state drive (SSD) platform that delivers the industry's most advanced enterprise SSD solution. Engineered with Phison's technology to meet the evolving demands of faster and smarter global data-center infrastructures, the X1 SSD platform was designed in partnership with Seagate Technology Holdings plc, a world leader in mass-data storage infrastructure solutions. The X1 SSD customizable platform offers more computing with less energy consumption. With a cost-effective solution that eliminates bottlenecks and improves quality of service, the X1 offers more than a 30 percent increase in data reads than existing market competitors for the same power used.

"We combined Seagate's proprietary data management and customer integration capabilities with Phison's cutting-edge technology to create highly customized SSDs that meet the ever-evolving needs of the enterprise storage market," said Sai Varanasi, senior vice president of product and business marketing at Seagate Technology. "Seagate is excited to partner with Phison on developing advanced SSD technology to provide the industry with increased density, higher performance and power efficiency for all mass capacity storage providers."

Micron Technology, Inc. (NASDAQ: MU) commends and thanks the Biden Administration for their leadership and the bipartisan work of Congress for passing the "Chips and Science" legislation. This is a big step towards securing the future of semiconductor manufacturing in the United States and advancing American innovation and competitiveness for years to come.

This legislation will bring leading-edge semiconductor manufacturing to the U.S., creating tens of thousands of jobs and tens of billions of dollars of new investments - transforming U.S. semiconductor innovation and supply chain resilience.

As The CHIPS and Science Act of 2022 heads to President Biden's desk for his signature, following its passage in Congress, OSTP's Dr. Alondra Nelson is releasing the following statement: "The bipartisan CHIPS and Science Act of 2022 is the most significant American investment in science, technology, and innovation in a generation. It will revitalize and advance U.S. leadership in science and technology, spur U.S. competitiveness and economic development, and bolster our domestic semiconductor supply chains. Most important, it will deliver opportunities for Americans all across the nation.

For working Americans, the stakes of this legislation could not be higher. Semiconductor chips power our daily lives, from the telecommunications that keep us all connected, and medical devices that keep our loved ones alive, to financial institutions that help secure our families' futures, and the computers from which millions of Americans run their businesses. They are a door to a future of innovation, progress, and economic security.

[Editor's Note: We Reviewed Razer DeathStalker V2 Pro Optical Keyboard here.]

Razer, the leading global lifestyle brand for gamers, today announced the return of the acclaimed DeathStalker keyboard in the form of the new DeathStalker V2 Pro, DeathStalker V2 Pro Tenkeyless, and DeathStalker V2.

With a clean, low-profile design language running across the range, the new DeathStalker V2 line is ideal for gamers looking for a clutter-free desktop set-up. Boasting a sleek, low-profile design, the DeathStalker V2 line is all about high-profile performance, featuring both linear and clicky variants of the Razer Low-profile Optical Switches across the range. Adding to the premium experience are a slim-line aluminium top plate for superb durability, and laser-etched keycaps with an ultra-durable coating for even greater longevity.

The Chinese technology giant, SMIC, has managed to advance its semiconductor manufacturing technology and shipped the first 7 nm silicon manufactured on China's soil. According to analyst firm TechInsights, who examined the 7 nm Bitcoin mining SoC made for MinerVa firm, there are doubts that SMIC 7 nm process is somewhat similar to TSMC's 7 nm process. Despite having no access to advanced semiconductor manufacturing tools, and US restrictions placed around it, SMIC has managed to produce what resembles an almost perfect 7 nm node. This could lead to a true 7 nm logic and memory bitcells sometimes in the future, as the node advances in SMIC's labs.

Having done an in-depth die analysis, the TechInsights report indicates that TSMC, Intel, and Samsung have a more advanced 7 nm node and are two nodes ahead of the Chinese SMIC. The results are not great regarding the economics and yield of this SMIC 7 nm process. While we have no specific data, the report indicates that the actual working chips made with older DUV tools are not perfect. This is not a problem for the Chinese market as it seeks independence from Western companies and technology. However, introducing a China-made 7 nm chip is more critical as it shows that the country can manufacture advanced nodes with restrictions and sanctions in place. The MinerVa SoC die and the PCB that houses those chips are pictured below.

Samsung Foundry will engage Ansys' industry-leading electromagnetic (EM) simulation tools to develop ultramodern designs, including 5G/6G, on the most advanced chips, nodes, and process technologies. Ansys' simulation solutions will deliver a comprehensive EM-aware design flow with greater capacity, speed, and integration capabilities for Samsung's most advanced semiconductor technology, accelerating on-chip design cycle times to boost high-speed connectivity while helping to reduce design error and risk.

Samsung designers will leverage Ansys' EM design tools, Ansys RaptorX, Ansys VeloceRF, and Ansys Exalto, to help reduce time to market by two to three weeks on smaller designs and up to two months for complex designs. With automation capabilities that optimize calculations and modeling, coupled with larger capacity, Ansys' software will allow the Samsung team to design at faster speeds with higher fidelity.