Tuesday, June 18th 2019

PCI-SIG Announces PCIe 6.0 Specification

PCI-SIG today announced that PCI Express (PCIe ) 6.0 technology will double the data rate to 64 GT/s while maintaining backwards compatibility with previous generations and delivering power efficiency and cost-effective performance. The PCIe 6.0 specification is actively targeted for release in 2021.

PCIe 6.0 Specification Features
  • Delivers 64 GT/s raw bit rate and up to 256 GB/s via x16 configuration
  • Utilizes PAM-4 (Pulse Amplitude Modulation with 4 levels) encoding and leverages existing 56G PAM-4 in the industry
  • Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
  • Maintains backwards compatibility with all previous generations of PCIe technology
"PCI Express technology has established itself as a pervasive I/O technology by sustaining bandwidth improvements for five generations over two decades," Dennis Martin, an analyst at Principled Technologies, said. "With the PCIe 6.0 specification, PCI-SIG aims to answer the demands of such hot markets as Artificial Intelligence, Machine Learning, networking, communication systems, storage, High-Performance Computing, and more."

"Continuing the trend we set with the PCIe 5.0 specification, the PCIe 6.0 specification is on a fast timeline," Al Yanes, PCI-SIG Chairman and President, said. "Due to the continued commitment of our member companies, we are on pace to double the bandwidth yet again in a time frame that will meet industry demand for throughput."

To learn more about PCI-SIG, visit www.pcisig.com.

About PCI-SIG

PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. The organization defines industry standard I/O (input/output) specifications consistent with the needs of its members. Currently, PCI-SIG is comprised of over 800 industry-leading member companies. To join PCI-SIG, and for a list of the Board of Directors, visit www.pcisig.com.

PCI-SIG, PCI Express, and PCIe are trademarks or registered trademarks of PCI-SIG. All other trademarks are the property of their respective owners.
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34 Comments on PCI-SIG Announces PCIe 6.0 Specification

#26
zlobby
fynxer
Amateur hour, why only double each time.

Just go for 1TB/s right away with PCIe 6.0

Also DDR5 memory is obsolete as system memory, they really need to up the game to develop a new system memory that at least starts at 1TB/s bandwidth and double the speed each generation.
Right, amateurs indeed. One would expect they include quantum lasers and black hole evaporation by now!
Posted on Reply
#27
karakarga
PCI express 6 bandwidth needs 8 times faster ram bandwidth to be efficient. Currently with 4 channel DDR3 around 50 GB/s with 1866 MHz, DDR4 around 80 GB/s with 3000 MHz.

8 times of 50 GB/s is 400 GB/s. 8 times of 80 GB/s is 640 GB/s ram bandwidth it needs. (Assuming around 40 to 48 lines, for more lines like 64 to 80, another 1.5 times gives ~1000 GB/s Ram bandwidth. May reach 1,5 TB/s with 6 channels as well.

Seemingly, when PCI express 6 really hits the market within 3 to 5 years, ram bandwidth may go up 10 to 30 fold!

RTX 2080 Ti bandwidth is around 735.7 GB/s today with 11 channel DDR6 Rams working at 7000 MHz. Actually we are only 1,36 fold behind reaching to 1TB/s.
Posted on Reply
#28
bug
karakarga
PCI express 6 bandwidth needs 8 times faster ram bandwidth to be efficient. Currently with 4 channel DDR3 around 50 GB/s with 1866 MHz, DDR4 around 80 GB/s with 3000 MHz.

8 times of 50 GB/s is 400 GB/s. 8 times of 80 GB/s is 640 GB/s ram bandwidth it needs. (Assuming around 40 to 48 lines, for more lines like 64 to 80, another 1.5 times gives ~1000 GB/s Ram bandwidth. May reach 1,5 TB/s with 6 channels as well.

Seemingly, when PCI express 6 really hits the market within 3 to 5 years, ram bandwidth may go up 10 to 30 fold!

RTX 2080 Ti bandwidth is around 735.7 GB/s today with 11 channel DDR6 Rams working at 7000 MHz. Actually we are only 1,36 fold behind reaching to 1TB/s.
PCIe does not need to touch RAM. When you copy from device to another, your RAM speed is irrelevant. You could run today's PCIe x4 drives on a single lane going forward (note: new drives required), we've been starved for PCIe lanes for quite a while now.
Posted on Reply
#29
karakarga
Without bandwidth provided by Ram's, PCI express can not transfer data, you are wrong! There is a triangle between CPU, Rams and PCI express channels. If one side falls behind, data transfer sticks to the lowest one. For example 2 channel mainboards can run 1 graphics card at full speed, but 4 channel mainboards can run 2 graphics cards at full speed for that reason.
Posted on Reply
#30
Aquinus
Resident Wat-man
fynxer
Also DDR5 memory is obsolete as system memory
karakarga
RTX 2080 Ti bandwidth is around 735.7 GB/s today with 11 channel DDR6 Rams working at 7000 MHz.
First of all, you're both saying DDR5 and DDR6, when you should be saying GDDR5 and GDDR6. For example GDDR4 and DDR4 are two very different technologies considering GDDR4 is based on DDR3 and has nothing to do with DDR4. Same deal with GDDR5 which is also based on DDR3.
karakarga
Without bandwidth provided by Ram's, PCI express can not transfer data, you are wrong! There is a triangle between CPU, Rams and PCI express channels. If one side falls behind, data transfer sticks to the lowest one. For example 2 channel mainboards can run 1 graphics card at full speed, but 4 channel mainboards can run 2 graphics cards at full speed for that reason.
That's not exactly true and there are a lot of factors that go into determining what is going to become your bottleneck. 16 lanes of PCIe 3.0 is just under 16GB/s, 32 lanes is just under 32GB/s. My system with quad-channel DDR3 memory easily does at least 50GB/s and I've seen it get as high as 60GB/s when I'm really trying to push it and modern CPUs with dual-channel setups and DDR4 can get pretty close to that. Considering that most mainstream CPUs don't give you more than 16-20 PCIe lanes, there is more than enough memory bandwidth, even with dual-channel DDR3, to drive all of those PCIe lanes at 3.0.

So while you're right that the slowest interconnect is going to be the bottleneck, you're wrong to assume that system memory bandwidth can be saturated by PCIe under most circumstances.
bug
PCIe does not need to touch RAM. When you copy from device to another, your RAM speed is irrelevant.
Only for unbuffered transfers or for buffers that are small enough to fit into cache, otherwise it will hit system memory (and might still even hit system memory anyways since cache tends to write back to system memory,) but it's not like that's going to be a constraint since there is a lot more memory bandwidth in most situations than PCIe bandwidth.
Posted on Reply
#31
zlobby
karakarga
PCI express 6 bandwidth needs 8 times faster ram bandwidth to be efficient. Currently with 4 channel DDR3 around 50 GB/s with 1866 MHz, DDR4 around 80 GB/s with 3000 MHz.

8 times of 50 GB/s is 400 GB/s. 8 times of 80 GB/s is 640 GB/s ram bandwidth it needs. (Assuming around 40 to 48 lines, for more lines like 64 to 80, another 1.5 times gives ~1000 GB/s Ram bandwidth. May reach 1,5 TB/s with 6 channels as well.

Seemingly, when PCI express 6 really hits the market within 3 to 5 years, ram bandwidth may go up 10 to 30 fold!

RTX 2080 Ti bandwidth is around 735.7 GB/s today with 11 channel DDR6 Rams working at 7000 MHz. Actually we are only 1,36 fold behind reaching to 1TB/s.
7000MHz? Do I need to go further?
Posted on Reply
#32
karakarga
@zlobby

We are always doing that, sooner or later.... :)
Posted on Reply
#33
Gasaraki
R0H1T
I bet this is Intel pushing their agenda with CXL, much like TB & USB 4.0 :ohwell:

They can't skip PCIe 4.0 as it's already here & has been for the last 2 years, IBM had it on their chips but it didn't become mainstream because ARM & x86 didn't support it. With zen2 AMD have leapfrogged Intel in terms of feature/parity & (peripheral) connectivity, but looks like Intel wants everyone else to skip PCIe 4.0 & go straight to rev.5 especially with their push for CXL.
But they are skipping PCI 4.0. Their next chipset will have PCIe 5.0.
Posted on Reply
#34
kapone32
Gasaraki
But they are skipping PCI 4.0. Their next chipset will have PCIe 5.0.
I thought so too but that is for the data center and not consumers.
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