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Upcoming Hardware Launches 2020 (Updated Apr 2020)
(159 User Comments) »Introduction
In this article, which our team will regularly update, we will maintain a growing list of information pertaining to upcoming hardware releases based on leaks and official announcements as we spot them. There will obviously be a ton of rumors on unreleased hardware, and it is our goal to—based on our years of industry experience—exclude the crazy ones. In addition to these upcoming hardware release news, we will regularly adjust the structure of this article to better organize information. Each time an important change is made to this article, it will re-appear on our front page with a "new" banner, and the additions will be documented in the forum comments thread. This article will not leak information we signed an NDA for.Feel free to share your opinions and tips in the forum comments thread and subscribe to the same thread for updates.
Last Update (Apr 6th):
- Added AMD Renoir for Desktop
- Added AMD Ryzen 3 3100 & Ryzen 3 3300X
- Added AMD Zen 3 Cézanne APU
- Updated AMD Zen 3
- Updated Intel Comet Lake
- Updated Intel Alder Lake
- Updated AMD Arcturus
- Added NVIDIA GeForce MX450
- Updated Intel 400 Series Chipsets
- Added AMD 600-Series Zen 3 Chipsets
- Updated Hynix 128-layer Flash
- Added Samsung 160-layer Flash
- Updated TSMC 3-nanometer Process
- Added TSMC 2-nanometer Process
- Added Samsung 3-nanometer Process
Processors
AMD Renoir for Desktop [added]
- Release Date: Unknown
- Uses same Renoir silicon as Ryzen Mobile 4000 CPUs
- Codename: Artic [sic]
- 3.0 GHz CPU clock, 1.2 GHz GPU clock, 1.6 GHz memory clock
AMD Ryzen 3 3100 & Ryzen 3 3300X [added]
- Announced: April 21st 2020
- Release Date: May 2020
- Uses same Zen 2 Matisse silicon as other Ryzen 3000 processors
- Ryzen 3 3100: 4c/8t, 65 W, 3.6 GHz base, 3.9 GHz boost, 16 MB cache, $100
- Ryzen 3 3300X: 4c/8t, 65 W, 3.8 GHz base, 4.3 GHz boost, 16 MB cache, $120
- Ryzen 3100 uses 2+2 CCX configuration, Ryzen 3300X uses 4+0 CCX configuration
- Cinebench 1T: Ryzen 3100 = 444, Ryzen 3300X = 491
- Cinebench nT: Ryzen 3100 = 2154, Ryzen 3300X = 2341
AMD Cézanne Zen 3 APUs [added]
- Release Date: Probably 2021
- Built on Zen 3 CPU cores, paired with RDNA2 GPU
- Built on refined 7 nm process, N7P or N7+
- Comes in 15 W and 45 W SKUs
AMD Zen 3 [updated]
- Release Date: September 2020
- Design completed as of Aug 2019
- Codename: Vermeer (CPU), Dali (APU w/ IGP)
- Socket AM4
- Server platform codename "Milan"
- Up to 64-cores (128-threads) across eight 8-core chiplets
- 120 - 225 W TDP
- PCIe Gen 4
- 8-channel DDR4 memory
- New process tech: 7 nm Plus (probably not 7 nm+ EUV)
- Uses EUV (extreme ultraviolet) silicon fabrication node at TSMC
- 20% increase in transistor density, 10% lower power consumption
- Up to 15% IPC improvement + more from higher clock frequencies
- Up to 50% faster floating point
- Possibly support for AVX-512
- New CPU core
- Redesigned chiplets with 32+ MB shared L3 on each chiplet, as opposed to 2x 16 MB shared between CCX groups
- Continues to use socket AM4
AMD Zen 4
- Release Date: 2021
- "In Design" as of Nov 2018
- "On Track" for 2021 launch as of Dec 9, 2019
- 5 nm TSMC process
- DDR5 memory support
- Improves IPC
- Server platform codenamed "Genoa"
- PCI-Express Gen 5
- More cores per chiplet
- Uses 3rd generation Infinity Fabric, which adds cache-coherent unified memory
- Uses Socket SP5 for EPYC, new mainstream socket expected (AMD Socket AM5)
Intel Ice Lake
- Release Date: Late 2019 (mobile), desktop/server 2020
- Ice Lake for desktop might be delayed even further (or scrapped completely) due to issues with the 10 nm process
- Uses 10 nanometer DUV (deep-ultraviolet) process
- Will use "Intel 10th gen" branding, with Core i3, i5 and i7
- First processors are mobile quad-core designs
- Ultra-low-power (ULP) platform was displayed at Computex: Using a multi-chip-module design, with TDP between 8 and 15 W
- Mass production started in Q3 2019
- Uses a brand-new CPU core design codenamed "Sunny Cove"
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
- 20-30 broadening of various number crunching resources, wider execution window, more AGUs
- SHA-NI and Vector-AES instruction sets, up to 75% higher encryption performance vs. "Skylake"
- Supports unganged memory mode
- First implementation will not be for a desktop processor, but a low-power SOC for notebooks (Ice Lake-U)
- Ice Lake-U is 4-core/8-thread based on Sunny Cove w/ Gen 11 GT2 graphics with 64 EUs.
- Ice Lake SP are Xeons "Whitley", which will launch in 2020.
- Integrated GPU based on new Gen11 architecture, up to 1 TFLOP/s ALU compute performance
- Integrated GPU supports DisplayPort 1.4a and DSC for 5K and 8K monitor support
- Gen11 also features tile-based rendering, one of NVIDIA's secret-sauce features
- Integrated GPU supports VESA adaptive V-sync, all AMD FreeSync-capable monitors should work with this
Intel Core i9-10990XE
- Release Date: unknown, probably early 2020
- 22-cores + HyperThreading
- Uses Cascade Lake-X architecture
- LGA2066 Socket
- 1 MB L2 cache per core, 30.25 MB shared L3 cache
- 4 GHz base, up to 5 GHz boost
- Roughly matches Threadripper 3960X in Cinebench
Intel Cannon Lake
- Release Date: Additional processors delayed to 2019+, probably canceled
- One mobile SKU launched in May: Core i3-8121U 2.2 GHz, no integrated graphics
- Core M3 8114Y: 1.5 GHz base, 2.2 GHz boost, 4.5 W TDP, Intel UHD iGPU
- 10 nanometer production process
- DDR4L support
- Intel is reportedly having difficulties ramping up 10 nm, which could lead to delays
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
Intel Comet Lake [updated]
- Announcement: April 30th 2020
- Review Embargo: May 27th 2020
- Retail Availability: May 30th 2020
- Mobile CPUs launched in Aug 2019 (up to 6c/12t)
- Introduces 10-core CPUs, up to 20 threads
- Core i9-10900K: 10c/20t, 3.7 GHz base, 5.3 GHz boost, 4.8 GHz all-core, 125 W, 20 MB L3, € 600
- Core i9-10900KF: 10c/20t, 3.7 GHz base, 5.3 GHz boost, 4.8 GHz all-core, 125 W, 20 MB L3, € 560
- Core i9-10900T: 10c/20t, 1.9 GHz base, 20 MB L3, € 540
- Core i9-10900: 10c/20t, 2.8 GHz base, 5.2 GHz boost, 4.5 GHz all-core, 65 W, 20 MB L3, € 540, $486
- Core i9-10900F: 10c/20t, 2.8 GHz base, 5.2 GHz boost, 4.5 GHz all-core, 65 W, 20 MB L3, € 510
- Core i7-10700K: 8c/16t, 3.8 GHz base, 5.1 GHz boost, 4.7 GHz all-core, 125 W, 16 MB L3, € 460, $419, performance comparable to Ryzen 7 3800X
- Core i7-10700KF: 8c/16t, 3.8 GHz base, 5.1 GHz boost, 4.7 GHz all-core, 125 W, 16 MB L3, € 430
- Core i7-10700T: 8c/16t, 2.0 GHz base, 16 MB L3, € 400
- Core i7-10700: 8c/16t, 2.9 GHz base, 4.6 GHz all-core, 65 W, 16 MB L3, € 400, $362, performance comparable to Ryzen 7 3700X
- Core i7-10700F: 8c/16t, 2.9 GHz base, 4.9 GHz boost, 4.6 GHz all-core, 65 W, 16 MB L3, € 370
- Core i5-10600K: 6c/12t, 4.1 GHz base, 4,8 GHz boost, 4.5 GHz all-core, 125 W, 12 MB L3, € 315, performance comparable to Ryzen 5 3600X
- Core i5-10600KF: 6c/12t, 4.1 GHz base, 4.6 GHz boost, 4.5 GHz all-core, 125 W, 12 MB L3, € 280
- Core i5-10600: 6c/12t, 3.3 GHz base, 4.4 GHz all-core, 65 W, 12 MB L3, € 266
- Core i5-10600T: 6c/12t, 2.4 GHz base, 12 MB L3, € 266
- Core i5-10500: 6c/12t, 3.1 GHz base, 4.2 GHz all-core, 65 W, 12 MB L3, € 240
- Core i5-10500T: 6c/12t, 2.3 GHz base, 12 MB L3, € 240
- Core i5-10400: 6c/12t, 2.9 GHz base, 4.0 GHz all-core, 65 W, 12 MB L3, € 230
- Core i5-10400F: 6c/12t, 2.9 GHz base, 4.3 GHz boost, 4.0 GHz all-core, 65 W, 12 MB L3, € 200
- Core i5-10400T: 6c/12t, 2.0 GHz base, 12 MB L3, € 230
- Core i3-10320: 4c/8t, 3.8 GHz base, 4.4 GHz all-core, 65 W, 8 MB L3, € 200
- Core i3-10300: 4c/8t, 3.7 GHz base, 4.2 GHz all-core, 65 W, 8 MB L3, € 180
- Core i3-10300T: 4c/8t, 3.0 GHz base, 8 MB L3, € 180
- Core i3-10100: 4c/8t, 3.6 GHz base, 4.1 GHz all-core, 65 W, 6 MB L3, € 160
- Core i3-10100T: 4c/8t, 3.0 GHz base, 6 MB L3, € 160
- Pentium G6600: 2c, 4.2 GHz, 4 MB L3, € 110
- Pentium G6500: 2c, 4.1 GHz, 4 MB L3, € 100
- Pentium G6400: 2c, 4.0 GHz, 4 MB L3, € 90
- Pentium G5920: 2c, 3.5 GHz, 2 MB L3, € 70
- Pentium G5900: 2c, 3.2 GHz, 2 MB L3, € 60
- Core i7-10710U SoC, 6c/12t, 12 MB L3, up to 4.70 GHz Turbo, UHD Graphics @ 1.15 GHz, 25 W TDP
- Core i5-10210U SoC, 4c/8t, 8 MB L3, up to 4.20 GHz Turbo, UHD Graphics @ 1.00 GHz, 25 W TDP
- Core i3-10110U SoC, 2c/4t, 4 MB L3, up to 4.10 GHz Turbo, UHD Graphics @ 1.00 GHz, 25 W TDP
- Uses 14 nm production process
- 35 W (low power), 65 W (mainstream), 125 W (enthusiast)
- Turbo Boost 3.0
- Introduces Thermal Velocity Boost algorithm, which can boost the 10900K up to 5.3 GHz
- Adds C10 and S0ix Modern Standby power-states
- 40 PCIe lanes
- Improved media capabilities (Rec.2020 & HDR, HEVC 10-bit encode/decode, VP9 10-bit decode)
- Gen 9.5 integrated GPU
- Support for 2.5 GbE wired LAN with an Intel i225-series PHY, 802.11ax WiFi 6 WLAN, etc.
- UHD Graphics 630, up to 24 EU
- Requires new 400-Series chipsets and motherboards, Socket LGA1200
- PCI-Express 3.0
- DDR4-2933 Dual Channel memory
- No significant architectural changes expected over "Coffee Lake"
- Adds BFLOAT16 deep learning boost instructions
- Same cache hierarchy, with 256 KB per core L2 cache, and 20 MB shared L3 cache
- Developed to counter AMD's Zen 2
- i9-10900K scores 30% more than the i9-9900K in SPECint_rate_base2006_IC16.0
- NUC: "Frost Canyon", launches December 12
- Core i3-10100: Cinebench R20 448 1t, 2284 nT
- Core i3-10300: Cinebench R20 457 1t, 2330 nT
Intel Lakefield Heterogenous processor
- Release Date: 2020
- Previewed: Oct 3, 2019
- Uses 10 nanometer production process
- A rendition of ARM big.LITTLE, but with Intel x86 cores
- One large performance core combined with four low-power cores, and power-gating added to the mix
- Uses Foveros Technology, which stacks IP blocks in three dimensions, not in a 2D plane like all current chip designs
- Die size 12 mm x 12 mm x 1 mm
- Big core is Sunny Cove based, small cores are Tremont based
- Integrated Gen11 iGPU
- Fully integrated chipset and network interfaces
- Package designed for PoP (package over package) setups with DRAM and NAND flash chips over Foveros packaging
- Target devices include tablets and tablet+notebook convertibles
- Project Athena is an industry-wide effort involving a dozen companies to develop the next step in powerful mobile computing, rivaling the Ultrabook development a decade ago
- Intel i5-L16G7: 1.4 GHz base, 1.75 GHz turbo, LPDDR4X memory
- Intel i5-L15G7: 5c/5t, 4 small Tremont cores + 1 big Sunny Cove core, 1.4 GHz base, 2.75 GHz turbo, 1 MB L2, 4 MB L3
Intel Tiger Lake [updated]
- Release Date: H2 2020
- Intel reconfirmed "mid-2020" in their April 2020 Investor Call.
- Mobile chip, succeeds "Lakefield"
- CPU cores based on Willow Cove
- Will be used in "Ghost Canyon" and "Panther Canyon" NUC
- 28 W TDP
- Reorganized cache architecture
- Produced on 10 nm+ process
- Tiger Lake-Y: 4-core/8-thread, 1.25 MB L2 cache per core, 12 MB L3 cache
- Tiger Lake-U: 28 W TDP
- Larger L1D (data) cache: 48 KB
- L1I (instruction) cache: 32 KB
- DDR4-3200 memory speed
- Platform name "Corktown"
- Adds support for LPDDR5 memory, up to 6.4 GT/s
- PCI-Express Gen 4
- Integrated GPU based on Intel Xe architecture (not Gen 11)
- GPU performance comparable to 8 CU Radeon Vega iGPU
- Cache size increased from 2 MB per-core to 3 MB per-core, so total 12 MB
- "Double digit CPU performance increase", "Massive AI performance enhancement"
- AVX512 supported
- Uses 10 nm+ process
- "Next-gen I/O", probably PCIe 4.0
- Thunderbolt support
- Core i7-1185G7 3DMark: 2922 CPU, 1296 GPU, overall 1414
- Core i7-1165G7 3DMark: 4750 CPU, 1150 GPU, overall 1297
Intel Tremont / Snow Ridge
- Release Date: 2020
- Pentium Silver SoC
- Successor to Goldmont
- Design-focus: single-threaded performance & battery life
- Four cores
- Crypto acceleration
- L2 cache shared among 1-4 cores, up to 4.5 MB
- Adds L3 cache
- Intel Speed Shift
- Intel Total Memory Encryption
- Integrated GPU
- 10 nanometer
- 30% higher single-thread performance than Goldmont
Intel Cooper Lake
- Announced Aug 2019
- Shipping in Q2 2020
- Xeon Platinum 9200 Series
- Refresh of Cascade Lake
- 14 nanometer production process
- Uses same socket and platform
- Up to 56 cores per socket
- TDP: 300 W
- Up to 48 cores/96 threads
- 64 PCIe 3.0 lanes
- 8-channel memory, DDR4-3200
- Deep Learning Boost gets additional instructions (compared to Cascade Lake): BFLOAT16
- Higher clock speeds
Intel Willow Cove and Golden Cove Cores
- Release Date: 2020 and 2021
- Succeeds "Sunny Cove"
- Willow Cove improves on-die caches, adds more security features, and takes advantage of 10 nm+ process improvements to increase clock speeds versus Sunny Cove
- Golden Cove will add significant single-thread (IPC) increases over Sunny Cove, add on-die matrix multiplication hardware, improved 5G network-stack HSP performance, and more security features than Willow Cove
Intel Alder Lake [updated]
- Release Date: 2020
- Mixes CPU cores of various processing power (and energy consumption), similar to the Big.Little-like designs for mobile devices
- Combines up to eight Golden Cove with up to eight Gracemont (Atom) cores
- 10 nm process
- Uses Socket LGA1700
- Desktop CPUs come in 125 W and 80 W
- Possible CPU configurations 8+8+1 (8 big cores, 8 small cores, GT1 integrated), and 6+0+1 (6 big cores, no small cores and GT1 integrated)
- PCI-Express 4.0 support
Intel Sapphire Rapids
- Release Date: 2021
- Successor to Cooper Lake
- 8-channel DDR5
- Uses Socket LGA4677
- For enterprise / data center
- PCIe 5.0
- Probably 7 nm process
- Platform name: Eagle Stream
Intel Rocket Lake
- Release Date: 2021, maybe even late 2020
- Succeeds "Comet Lake"
- Variants: Rocket Lake-"S" (mainstream desktop), -"H" (mainstream notebook), -"U" (ultrabook), and -"Y" (low power portable)
- 14 nanometer production process
- Could be a backport of "Willow Cove" to 14 nm process
- No FIVR, uses SVID VRM architecture
- 125 W maximum TDP
- Adds Gen 12 iGPU with Skylake CPU cores
- Uses 500-series chipsets
- Socket LGA1200 (just like Comet Lake)
- Supports PCI-Express 4.0
- 20 PCIe lanes
- Intel Xe integrated graphics, based on Gen 12 with HDMI 2.0b and DisplayPort 1.4a
- 2.5 Gb/s Ethernet, Thunderbolt 4, USB 3.2 20G
- iGPU with up to 32 EUs
- Memory support: DDR4-2933
- Possibly higher clocks and more cores than Comet Lake
Intel Meteor Lake
- Release Date: 2022
- Succeeds "Rocket Lake"
- New microarchitecture, more advanced than "Willow Cove", possibly "Golden Cove"
- Produced on 7 nm EUV Intel process
Intel Granite Rapids
- Release Date: 2022
- Successor to Sapphire Rapids
- 8-channel DDR5
- For enterprise / data center
- PCIe 5.0
- Probably 7 nm+ process
- Platform name: Eagle Stream
VIA CenTaur / Zhaoxin KaiXian
- Release Date: H2 2020
- Eight-core 64-bit CPU, 2.5 GHz
- AVX-512 supported
- 16 nm FinFET TSMC
- 195 mm² die size
- Use LGA socket
- Codename: "CHA", pronounced "C-H-A"
- Separate AI co-processor "NCORE"
- All cores + NCORE connected using a ring bus
- Integrated VIA S3 graphics with DirectX 11.1
- 16 MB shared L3 cache
- Four-channel DDR4-3200 memory support
- 44 PCI-Express 3.0 lanes
- Sold as Zhaoxin KaiXian KX-6780A in China (end of Jan 2020): 8 core, 8 threads, 2.7 GHz, 8 MB cache, dual-channel DDR4-3200
- Southbridge integrated
- Multi-socket capable
Graphics / GPUs
NVIDIA RTX 2080 Ti Super
- Release Date: Early 2020
- Based on TU102 GPU
- 4608 shaders (full silicon enabled)
- 576 tensor cores, 72 RT cores
- 288 TMUs, 96 ROPs
- Faster 16 Gbps GDDR6 memory
- 352-bit memory bus, 11 GB VRAM
NVIDIA RTX 2060 Super Mobile
- Release Date: 2020
- Based on TU106 GPU
- 2,176 shaders, just like desktop RTX 2060 Super
- 136 TMUs, 64 ROPs, 272 tensor cores, 34 RT cores
- 8 GB GDDR6, 256-bit bus
- 1305 MHz GPU base clock, 1486 MHz Boost
- 14 Gbps memory
- An additional MaxQ SKU seems likely
NVIDIA GeForce MX450 Mobile [added]
- Release Date: Unknown
- Based on TU117 GPU
- GPU clock 540 MHz, 2 GB GDDR6 at 2505 MHz
- TSMC 12 nanometer process
- 1024 shaders, 64 TMUs, 32 ROPs
NVIDIA Ampere
- Release Date: probably H2 2020, or even 2021
- Successor to "Turing" architecture
- GeForce RTX 3000 Series
- Engineering Sample: 7936 CUDA cores, 124 CUs, at 1.1 GHz, 32 GB VRAM
- Engineering Sample: 7552 CUDA cores, 118 CUs, at 1.2 GHz, 24 GB VRAM
- Engineering Sample: 6912 CUDA cores, 108 CUs, at 1.01 GHz, 47 GB VRAM
- GA103 is used on GeForce RTX 3080, 60 SMs = 3840 CUDA cores, 320-bit memory, 10 or 20 GB GDDR6
- GA103 is used on GeForce RTX 3080, 60 SMs = 3840 CUDA cores, 320-bit memory, 10 or 20 GB GDDR6
- GA104 is used on GeForce RTX 3070, 40 SMs = 3072 CUDA cores, 256-bit memory, 8 or 16 GB GDDR6
- Produced on 7 nm Samsung process
- Half the power consumption
- Up to 18 TFLOPs of FP64 compute performance
- Twice the performance (possibly for raytracing workloads)
- Tesla server cards are going into Indiana University Big Red 200 supercomputer
NVIDIA Hopper
- Release Date: unknown
- Successor to "Ampere" architecture
- MCM (multi-chip module) GPU packages
- Seems to be for workstation/compute only
AMD Radeon RX 5300 XT
- First sighting in a HP specs sheet
- Same specs as Radeon RX 5500 / Navi 14
- Could be a typo (RX 5500 intended)
AMD Radeon RX 5800 / Navi 12
- Release Date: 2020
- Seems to have been canceled in favor of Navi 10 based RX 5600
- Based on Navi 10 RDNA architecture
- 7 nanometer, possibly 7 nm+ EUV
- 36 CU / 2304 shaders
- Possibly HBM2 memory support, instead of GDDR6
Big Navi / Navi 20
- Release Date: unknown
- Uses RDNA2 graphics architecture
- 7 nanometer, possibly 7 nm+ EUV
- Goes up against NVIDIA high-end
- RX 5950 XT, RX 5950, and RX 5800 XT
- Aims to provide playable 4K framerates
- Lisa Su in a CES 2020 interview said "we will have a high-end Navi [...] it is important"
- Adds support for variable-rate shading and possibly hardware-accelerated ray-tracing
AMD MI-NEXT
- Release Date: Unknown
- Successor to Vega 20
- This could be the Arcturus-based Radeon Instinct MI100
AMD Arcturus [updated]
- Release Date: 2020
- Announcement could be at CES 2020
- TSMC, 7 nm+
- 128 Compute Units = 8192 shaders
- Arcturus engineering sample has 120 CUs (7680 shaders), 878 MHz for the core clock, 750 MHz SoC clock, and 1200 MHz memory clock
- Datacenter focused architecture based on Vega (not Navi)
- Product name: Radeon Instinct MI100
- Lacks 3D engine, so compute-only
- Uses 32 GB HBM2 memory from Hynix and Samsung
- 1000 MHz memory clock: 1 TB/s memory bandwidth
- GPU clock up to 1334 MHz
- 200 W TDP
- Adds support for BFloat16
AMD RDNA 2
- Release Date: Late 2020
- Lisa Su: "we will have our new next-generation RDNA architecture that will be part our 2020 lineup"
- Announcement could be at Computex 2020
- TSMC, 7 nm Plus (probably not 7 nm+ EUV)
- Up to 18% higher transistor density
- Higher clock speeds than RDNA
- 50% better performance per Watt than RDNA, twice the efficiency as GCN
- Adds variable rate shading
- Adds support for BFloat16
- Adds hardware raytracing acceleration (DXR version 1.1)
- Supports Microsoft DirectX 12 Ultimate API /DXR, VRS, Mesh Shaders & Sampler Feedback)
- Same GPU architecture powers PlayStation 5 & Xbox Series X
AMD RDNA 3
- Release Date: Late 2021 or 2022
- "Advanced Node", probably TSMC 6 nm or 5 nm
AMD CDNA and CDNA2
- Release Date: 2020 for CDNA and 2021-2022 for CDNA2
- New architecture that focuses on compute for "Radeon Instinct"
- Compute only—Rasterization, display controllers and media encoding hardware removed
- CDNA seems to be very similar to Vega
- Add Tensor cores like on NVIDIA
- HBM2E memory
- Infinity Fabric link to pool multiple GPUs
- CDNA2 implements Infinity Fabric gen 3.0 to support vast memory pools and cache-coherent unified memory access
Intel Xe Discrete Graphics
- Release Date: mid-2020
- Announcement: Xe DG1-SDV (Software Development Vehicle) announced at CES 2020 (Jan 9th 2020)
- First Intel Discrete GPU since ill-fated Larrabee
- New architecture built from the ground up, and not an upscale of Gen 11
- Developer kit shipping as of Q4 2019, called "Discrete Graphics DG1 External FRD1 Accessory Kit (Alpha) Developer Kit"
- SDV is 15.2 cm long, 96 Execution Units, PCI-Express x16, slot only power (so 75 W), 3x DisplayPort, 1x HDMI, high noise levels
- Up to 2x performance uplift for Intel Xe integrated graphics over previous Gen 11
- Using a multi-chip design approach, with Foveros, Intel Xe scales up to 512 EUs with 500 W
- 512 EU model is datacenter only, 300 W 256 EU model for enthusiast markets
- Targeted at 1080p gameplay, CES demonstration showed working gameplay on Destiny 2
- Could be produced at Samsung to leverage their 10 nm tech, while Intel ramps up its own
- Future Xe GPUs could be built on TSMC 6 nm and 3 nm nodes
- Raytracing hardware acceleration support will definitely be included on the data-center GPUs (and probably on the consumer models, too)
- Double-digit TFLOP/s scaling all the way up to 0.1+ PFLOP/s
- Will be used in upcoming Cray Aurora Supercomputer for Argonne National Laboratory in 2021
- Targeting a wide segment of markets, including consumer (client-segment) graphics, enthusiast-segment, and data-center compute
- Uses new graphics control panel that's being introduced during 2019
Intel Discrete GPU / Arctic Sound
- Release Date: 2020
- Intel will hold a world tour in 2019, to build enthusiasm for the new architecture
- Advanced management for power and clocks
- Test chip: 8x8 mm² die area, 1.54B transistors, 14 nm, 50-400 MHz clock, EUs at 2x clock if needed
- Raja Koduri who left AMD in late 2017 is somehow involved
- Confirmed to support VESA Adaptive Sync
Intel Ponte Vecchio
- Release Date: unknown
- Discrete GPU
- Produced on Intel 7 nanometer production process
- Multiple GPU dies will be combined into a single accelerator
- Architected "for HPC modeling and simulation workloads and AI training"
- Workloads can be processed by GPU and CPU at the same time, using Intel oneAPI
- Foveros packaging technology
- Xe link to combine multiple GPUs (CXL interconnect)
Intel Jupiter Sound
- Release Date: 2022
- Discrete GPU
- Produced on 10 nanometer production process
- Successor to Arctic Sound
Chipsets
Intel X399
- Release Date: unknown
- Supports Coffee Lake-X and Cannon Lake-X
Intel X499 / X299G
- Release Date: Originally late 2019, either postponed or canceled
- Will be used with Intel's new Core X HEDT processors, probably Cascade Lake X
- Apparently renamed from X499 to X299G—At Computex Gigabyte showed motherboards with "X499" print covered by "X299G" stickers
Intel X599
- Release Date: Unknown
- Supports new Intel 28-core HEDT platform
- New motherboards, with new socket: LGA3647
- Based on C629 Server Chipset
- 6-channel memory
- 48 PCIe lanes
Intel Z399
- Release Date: Unknown
- New HEDT chipset
- Sibling chipset to X599
- Socket LGA2066
- For 20- and 22-core CPUs
- Works with existing Skylake-X LCC and HCC chips
Intel 400 Series Chipsets [updated]
- Release Date: April 2020
- Models: Z490, H470, Q470, B460, W480
- W480 chipset meant for workstation solutions
- PCI-Express 3.0 (not 4.0), which means new boards once again when Rocket Lake releases with PCIe 4.0 support
- Socket LGA1200 (same coolers as LGA115x)
- For 10-core Comet Lake processors
- ASRock lineup: ASRock Z490 AQUA, Phantom Gaming 4, Phantom Gaming 4 SR, Phantom Gaming 6, Pro4, Steel Legend, Taichi, Z490M ITX AC, Z490M Pro4, H470 Steel Legend, H470M ITX AC, W480 Creator
- MSI lineup: Z490-A PRO (Standard ATX); Creator Z490I (Mini-ITX); MAG Z490 TOMAHAWK (Standard ATX); MEG Z390 ACE, MPG Z490M GAMING EDGE WIFI (Micro-ATX); MPG Z490 GAMING; CARBON WIFI (Standard ATX); MPG Z490 GAMING PLUS (Standard ATX); MEG Z490I UNIFY (Mini-ITX); MEG Z490 UNIFY (Standard ATX); MPG Z490 GAMING EDGE; WIFI (Standard ATX); MEG Z490 ACE (Standard ATX); MEG Z490 GODLIKE (E-ATX)
- Gigabyte lineup: Z490 AORUS Extreme WF, Z490 AORUS Extreme, Z490 AORUS Master, Z490 AORUS Ultra G2, Z490 AORUS Pro AX, Z590 AORUS Elite AC, Z490 AORUS Elite, Z490 AORUS Ultra, Z490 Vision D, Z490 Vision G, Z490 Gaming X, Z490 UD AC, Z490 UD, Z490 M Gaming X
Intel 500 Series Chipsets
- Release Date: 2021 or late 2020
- For Rocket Lake processors
- Socket LGA1200
- PCI-Express 4.0
- 2.5 Gb/s Ethernet, Thunderbolt 4, USB 3.2 20G
Intel 495 Series Chipsets
- Release Date: Unknown
- Chipset lineup for use with Ice Lake processors
AMD B550 & A520 Chipsets
- Release Date: June 2020 (production was delayed, and began in Q1)
- Supports Ryzen 3000 Zen 2 processors
- Lower cost motherboard option for Zen 2
- PCI-Express 4.0
- 2x USB 3.2 Gen2, 6x USB 2.0, 4 + 4 SATA3
- Socket AM4
- Designed by ASMedia
AMD B550A Chipset
- Release Date: Q4 2019
- Supports Ryzen 3000 Zen 2 processors
- Rebranded version of B450 chipset for low-cost motherboards, targeted at OEMs
- PCI-Express 3.0 (not 4.0)
- Socket AM4
AMD 600-Series Chipsets [added]
- Release Date: September 2020, at the same time as Zen 3
- Socket AM4
- Supporting Zen 3 Ryzen 4000 processors
- Support for older CPUs very likely, probably at least Ryzen 3000
- PCI-Express 4.0
Memory
DDR5 System Memory
- Release Date: 2020 or 2021
- JEDEC standard not fully complete yet, as of Q1 2020, expected for later in 2020
- Demo'd in May 2018 by Micron: DDR5-4400
- Samsung 16 Gb DDR5 DRAM developed since February 2018
- Samsung has completed functional testing and validation of a LPDDR5 prototype: 10 nm class, 8 Gbit, final clocks: DDR5-5500 and DDR5-6400
- SK Hynix has 16 Gb DDR5-5200 samples ready, 1.1 V, mass production expected 2020
- April 2020: Hynix has 8.4 Gbps DDR5, minimum density per die is 8 Gbit, maximum is 64 Gbit
- ECC is now supported by all dies (no longer specific to server memory modules)
- SK Hynix demonstrated DDR5 RDIMM modules at CES 2020: 4800 MHz, 64 GB
- Micron is shipping LPDDR5 for use in Xiaomi phones (Feb 2 2020). 5.5 Gbps and 6.4 Gbps
- Samsung has begun production for LPDDR5 for mobile devices (Feb 25 2020). 16 GB, 5.5 Gbps
- 4800 - 6400 Mbps
- Expected to be produced using 7 nm technologies
- 32 banks, 8 bank groups
- 64-bit link at 1.1 V
- Voltage regulators on the DIMM modules
HBM2E Graphics Memory
- Release Date: 2019
- Offers 3.2 Gbps per pin (33% faster than HBM2)
- Samsung Flashbolt: 16 Gb per die, 8-layers stacked, 16 GB per chip with 410 GB/s bandwidth
- Hynix: 460 GB/s, 3.6 Gbps, eight 16 Gb chips are stacked for a single 16 GB chip
HBM3 Graphics Memory
- Release Date: Not before 2019
- Double the memory bandwidth per stack (4000 Gbps expected)
- Expected to be produced using 7 nm technologies
Silicon Fabrication Tech
TSMC 7 nanometer+
- Release Date: Q4 2019
- TSMC N7+ is successor to original 7 nm node
- Uses EUV (Extreme Ultra Violet)
- 15-20% more density and improved power consumption over N7
TSMC 6 nanometer
- Release Date: Unknown
- Backwards compatible with 7 nm process—no new design tools needed
- Uses EUV (Extreme Ultra Violet), up to four EUV layers
- 18% higher logic density than N7
TSMC 5 nanometer
- Release Date: March 2020 to tape-out customer designs
- Risk production as of Q2 2019
- High volume production: Q2 2020
- Uses TSMC's second implementation of EUV (Extreme Ultra Violet)
- Up to 1.8x the density of 7 nm
- Up to 14 layers
- +15% higher clocks
- N5P "Plus" node: improvement to N5 while staying on 5 nm, 84-87% increase in transistor densities over N7
TSMC 3 nanometer [updated]
- April 2020: On-Track
- Risk production: 2021
- Volume production: H1 2022
- FinFET technology
- Uses TSMC's third implementation of EUV (Extreme Ultra Violet)
- 10-15% speed improvement at iso-power or 25-30% power reduction at iso-speed, compared to N5.
TSMC 2 nanometer [added]
- No details known other than "TSMC has started development"
Samsung 6 nanometer
- Release Date: Unknown
- First product taped out as of Q2 2019
- Uses EUV (Extreme Ultra Violet)
- Special variant for customers
Samsung 5 nanometer
- Release Date: Unknown
- Ready for customer sample production as of Q2 2019
- Uses EUV (Extreme Ultra Violet)
- Up to 25% the density of 7 nm
- 20% lower power consumption
- 10% higher performance
Samsung 3 nanometer [added]
- Release Date: 2022
- 50% less power while delivering 30% more performance
- 45% less silicon space taken per transistor (vs 7 nm)
www.techpowerup.com/265751/samsung-to-deliver-3-nm-manufacturing-process-in-2022-with-next-generation-transistors
[/spoiler]
Intel 7 nanometer
- Release Date: Planned for 2021
- Succeeded by 7 nm+ node in 2022, and 7 nm++ in 2023
- Uses EUV (Extreme Ultra Violet)
- 4x reduction in design rules
- Planned to be used on multiple products: CPU, GPU, AI, FPGA, 5G networking
Other
Hynix 4D NAND
- Release Date: H1 2019
- Developed by SK Hynix
- Sampling in Q4 2018
- Products demonstrated at CES 2020: Platinum P31 M.2 NVMe and Gold P31—PCIe 3.0 x4, using flash, DRAM and controller made by Hynix, over 3 GB/s read/write.
- Reduces chip physical size, while increasing capacity at the same time
- Supports TLC and QLC
- 30% higher write and 25% higher read performance
- 1.2 V
- 1st generation: 96 stacks, 1.2 Gbps per pin, 512 Gbit TLC
- 128 stacks in development, scales up to 512 stacks
Toshiba 5-Bit-per-Cell NAND Flash (PLC)
- Release Date: Unknown
- Stores an additional bit of information per cell (compared to QLC)
- 32 states per cell
- Will enable even cheaper SSDs, probably with a performance cost
Toshiba XL-Flash
- Developed by Toshiba
- Uses existing SLC flash technology to improve latencies
- 1/10th the read latency of TLC
- Good for random IOPS and better QoS at shallow queue depth
- Can combine SLC and TLC/QLC for tiered, cost-optimized storage
- Intel Optane memory competitor
- 128 gigabit (Gb) die (in a 2-die, 4-die, 8-die package)
- 4 KB page size for more efficient operating system reads and writes
- 16-plane architecture for more efficient parallelism
- Fast page read and program times
Micron 128-layer 3D NAND Flash
- Release Date: 2020, taped out as of Q4 2019
- CMOS-under-array design, but with Replacement Gate (RG) Technology instead of Floating Gate
- Only for few applications, more focused on next-generation RG tech, which brings down cost, too
Toshiba 128-layer 3D NAND Flash
- Release Date: 2020 or 2021
- Developed by Toshiba and partner Western Digital
- Called BiCS 5
- According to a press release in Feb 2020, this is actually a 112 layer stacking process
- Cells are TLC (not QLC)
- Chip density: 512 Gb
- Write performance per channel doubled to 133 MB/s
SK Hynix 128-layer 3D NAND Flash [updated]
- Mass Production: July 2020
- Up to 1 Tb TLC flash per chip
- Data rate up to 1400 Mbps at 1.2 V
- Products will be 2 TB client SSD with in-house controller and 16 TB / 32 TB NVMe datacenter SSDs.
Samsung 160-layer 3D NAND Flash [added]
- Release Date: End of 2020
- 7th generation V-NAND
Intel CXL Interconnect
- New interconnect for high-bandwidth devices like GPUs
- Targeted at enterprise and servers
- Competitor to NVLink, Infinity Fabric and PCI-Express
- Uses PCIe physical layer
- Link layer designed for low latency
- 32 Gbps per lane, per direction (Like PCIe Gen 5.0)
PCI-Express 5.0
- Specification released end of May 2019
- Products not expected before 2020
- 32 GT/s bandwidth per lane, per direction (4x the bandwidth of PCIe 3.0)
- 128/130 bit encoding (= 1.5% overhead)
- Implements electrical changes to improve signal integrity and mechanical performance of connectors
- Physical connector is backward compatible
- Signalling is backward compatible with all previous PCIe versions
PCI-Express 6.0
- Specification targeted for 2021
- Spec version 0.5 published as of Feb 24 2020
- 64 GT/s raw bit rate, up to 256 GB/s with x16
- Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
- Maintains backwards compatibility with all previous generations of PCIe technology
- New physical layer with PAM4 (pulse amplitude modulation) signaling replacing NRZ (non-return to zero)
USB 4.0
- Release Date: End of 2020
- Specification Released: September 2019
- Conceptually similar to Thunderbolt 3
- Up to 40 Gbps speeds using two-lane operation
- Multiple data and display protocols can share bandwidth
- Uses USB Type-C connector
- Backwards compatible with USB 2.0, 3.0, 3.1, 3.2 and Thunderbolt 3
- Resulting connection scales to the best mutual capability of the devices being connected