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Upcoming Hardware Launches 2019 (Updated)
(118 User Comments) »Introduction
In this article, which our team will regularly update, we will maintain a growing list of information pertaining to upcoming hardware releases based on leaks and official announcements as we spot them. There will obviously be a ton of rumors on unreleased hardware, and it is our goal to—based on our years of industry experience—exclude the crazy ones. In addition to these upcoming hardware release news, we will regularly adjust the structure of this article to better organize information. Each time an important change is made to this article, it will re-appear on our front page with a "new" banner, and the additions will be documented in the forum comments thread. This article will not leak information we signed an NDA for.Feel free to share your opinions and tips in the forum comments thread and subscribe to the same thread for updates.
Last Update (18th Oct):
- Added Ryzen 7 3750X, Ryzen 9 3900 & Ryzen 5 3500X
- Updated Threadripper 3rd Generation
- Updated AMD Zen 3 & Zen 4
- Updated Intel Core i9-9900KS
- Updated Intel Ice Lake
- Updated Intel Cascade Lake-X and marked as released
- Updated Intel Tiger Lake
- Updated Intel Sapphire Rapids
- Added Intel Rocket Lake
- Added Intel Meteor Lake
- Updated Intel Xe
- Added NVIDIA GTX 1660 Super
- Updated NVIDIA GTX 1650 Ti
- Added Radeon RX 5500 / Navi 14
- Added AMD Radeon RX 5300 XT
- Updated AMD Navi 12
- Added AMD B550A Chipset
- Updated AMD B550 Chipset
- Updated Intel 400 Series Chipsets
- Updated Updated AMD Threadripper 3rd Gen Chipsets
- Added Micron 128-layer NAND Flash
- Added TSMC N7+ EUV, Updated TSMC N6 & TSMC N5
Processors
Additional AMD Ryzen 3000 Zen 2 processors
- Same Zen 2 architecture as other Ryzen 3000 processors
- Ryzen 5 3500: 6 cores, 6 threads, no SMT, 3.6 GHz base, 4.1 GHz Turbo, $170-$180, OEM-only
- Ryzen 5 3500X: 6 cores, 6 threads, 3.6 GHz base, 4.1 GHz boost
- Ryzen 7 3750X: 8 cores, 16 threads, 105 W TDP, probably OEM-only
- Ryzen 9 3900: 12 cores, 24 threads, 3.1 GHz base, 4.3 GHz boost, 65 W TDP, 64 MB L3 cache, OEM-only
AMD Threadripper 3rd Gen [updated]
- Release Date: November 2019
- Based on AMD's EPYC Server Processors (Rome)
- Codename: Castle Peak & Sharkstooth
- Uses 7 nanometer process tech for CPU chiplets paired with 12 nm IO die
- Up to 64 cores
- Threadripper 3960X: 24 cores / 48 threads, lowest model in the new Threadripper lineup
- Up to Eight-channel DDR4 memory interface
- Up to 128 PCIe 4.0 lanes
- Castle Peak is 8-channel memory, Sharkstooth is 4-channel memory
- Not backwards compatible with X399
- Three new chipsets: TRX40, TRX80 and WRX80
AMD 3rd Generation Zen 2 APU (Renoir)
- Release Date: Early 2020, probably CES
- Codename: Renoir
- Successor to 12 nm Picasso
- Could be multi-chip module of a 7 nm "Zen 2" chiplet + new I/O die with integrated GPU
- GPU will be Vega based (not Navi)
- Updated display engine (8K, DSC 1.2a, 4K up to 240 Hz, 8K 60 Hz, 30-bit color)
- Updated multimedia engine (VP9 & H.265 up to 4K90, 8K up to 24 FPS and H.265 up to 4K150).
- Memory controller supports LPDDR4X up to 4266 MHz
AMD Zen 3 [updated]
- Release Date: 2020
- Design completed as of Aug 2019
- Codename: Vermeer (CPU), Dali (APU w/ IGP)
- Server platform codename "Milan"
- Up to 64-cores (128-threads) across eight 8-core chiplets
- 120 - 225 W TDP
- PCIe Gen 4
- 8-channel DDR4 memory
- New process tech: 7 nm+ EUV
- Uses EUV (extreme ultraviolet) silicon fabrication node at TSMC
- 20% increase in transistor density, 10% lower power consumption
- Energy-efficiency prioritized, only minor improvements in IPC over Zen 2
- New CPU core
- Redesigned chiplets with 32+ MB shared L3 on each chiplet, as opposed to 2x 16 MB shared between CCX groups
- Continues to use socket AM4
AMD Zen 4 [updated]
- Release Date: 2021
- "In Design" as of Nov 2018
- 7 nm or even 6 nm EUV
- More cores per chiplet
- Server platform codenamed "Genoa"
- Uses Socket SP5 for EPYC, new mainstream socket expected
Intel Core i9-9900KS [updated]
- Release Date: Q4 2019
- Based on 14 nm Coffee Lake refresh i9-9900K
- Base frequency 4.0 GHz
- All-core Boost: 5.0 GHz
- TDP: 127 W
- Priced around $600
- Improved Turbo algorithm for higher clocks at various workloads
Intel Lakefield Heterogenous processor
- Release Date: unknown
- Previewed: Oct 3, 2019
- Uses 10 nanometer production process
- A rendition of ARM big.LITTLE, but with Intel x86 cores
- One large performance core combined with four low-power cores, and power-gating added to the mix
- Big core is Sunny Cove based, small cores are Gracemont based
- Integrated Gen11 iGPU
- Fully integrated chipset and network interfaces
- Package designed for PoP (package over package) setups with DRAM and NAND flash chips over Foveros packaging
- Target devices include tablets and tablet+notebook convertibles
- Project Athena is an industry-wide effort involving a dozen companies to develop the next step in powerful mobile computing, rivaling the Ultrabook development a decade ago
Intel Comet Lake
- Release Date: Q1 2020
- Mobile CPUs launched in Aug 2019 (up to 6c/12t)
- Introduces 10-core CPUs, up to 20 threads
- Uses 14 nm production process
- Turbo Boost 2.0
- Improved media capabilities (Rec.2020 & HDR, HEVC 10-bit encode/decode, VP9 10-bit decode)
- Gen 9.5 integrated GPU
- Requires new 400-Series chipsets and motherboards, Socket LGA1200
- 35 W (low power), 65 W (mainstream), 125 W (enthusiast)
- PCI-Express 3.0
- DDR4-2666 Dual Channel memory
- No significant architectural changes expected over "Coffee Lake"
- Adds BFLOAT16 deep learning boost instructions
- Same cache hierarchy, with 256 KB per core L2 cache, and 20 MB shared L3 cache
- Developed to counter AMD's Zen 2
Intel Cannon Lake
- Release Date: Additional processors delayed to 2019
- One mobile SKU launched in May: Core i3-8121U 2.2 GHz, no integrated graphics
- Core M3 8114Y: 1.5 GHz base, 2.2 GHz boost, 4.5 W TDP, Intel UHD iGPU
- 10 nanometer production process
- DDR4L support
- Intel is reportedly having difficulties ramping up 10 nm, which could lead to delays
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
Intel Rocket Lake [added]
- Release Date: 2021
- Succeeds "Comet Lake"
- Adds Gen 12 iGPU with Skylake CPU cores
- Possibly higher clocks and more cores than Comet Lake
Intel Meteor Lake [added]
- Release Date: 2022
- Succeeds "Rocket Lake"
- New microarchitecture, more advanced than "Willow Cove", possibly "Golden Cove"
- Produced on 7 nm EUV Intel process
Intel Cascade Lake
- Released: April 3, 2019
- Server/Enterprise version of Whiskey Lake
- Same microarchitecture as Coffee Lake
- Still on 14 nm, using a slightly improved process
- 56 cores spread across two dies, using multi-chip-module
- FC-BGA package (not socketed), 5,903-pins
- Adds support for Optane Persistent Memory
- 12 memory channels per CPU (six per die)
- 88 PCI-Express lanes
- Mitigations for recent Intel vulnerabilities
- Supports AVX-512 and AES-NI
- Deep Learning Boost (Variable Length Neural Network Instructions)
- Intel Speed Select to select specific multipliers for CPU cores on running system, without reboot
Intel Cascade Lake-X [released]
- Release Date: Oct 7, 2019
- Same feature set as Cascade Lake but using LGA2066 platform
- Core i9-10980XE: 18c/36t, 3.0 GHz base, 4.6 GHz boost, 4.8 GHz Max Turbo Boost, 3.8 GHz all-core boost, 24.75 MB L3 cache, 165 W TDP, $979
- Core i9-10940X: 14c/28t, 3.3 GHz base, 4.6 GHz boost, 4.8 GHz Max Turbo Boost, 4.1 GHz all-core boost, 19.25 MB L3 cache, 165 W TDP, $784
- Core i9-10920X: 12c/24t, 3.5 GHz base, 4.6 GHz boost, 4.8 GHz Max Turbo Boost, 4.3 GHz all-core boost, 19.25 MB L3 cache, 165 TDP, $689
- Core i9-10900X: 10c/20t, 3.7 GHz base, 4.5 GHz boost, 4.7 GHz Max Turbo Boost, 4.3 GHz all-core boost, 19.25 MB L3 cache, 165 TDP, $590
Intel Cooper Lake
- Announced Aug 2019
- Shipping in H1 2020
- Xeon Platinum 9200 Series
- Refresh of Cascade Lake
- 14 nanometer production process
- Uses same socket and platform
- Up to 56 cores per socket
- Deep Learning Boost gets additional instructions (compared to Cascade Lake): BFLOAT16
- Higher clock speeds
Intel Sapphire Rapids [updated]
- Release Date: 2021
- Successor to Cooper Lake
- 8-channel DDR5
- Uses Socket LGA4677
- For enterprise / data center
- PCIe 5.0
- Probably 7 nm process
- Platform name: Eagle Stream
Intel Granite Rapids
- Release Date: 2022
- Successor to Sapphire Rapids
- 8-channel DDR5
- For enterprise / data center
- PCIe 5.0
- Probably 7 nm+ process
- Platform name: Eagle Stream
Intel Ice Lake [updated]
- Release Date: Late 2019, desktop 2020
- Ice Lake for desktop might be delayed even further (or scrapped completely) due to issues with the 10 nm process
- Uses 10 nanometer DUV (deep-ultraviolet) process
- Will use "Intel 10th gen" branding, with Core i3, i5 and i7
- Core i3-10100: 4-cores / 8-threads, 6 MB shared L3 cache, 3.6 GHz base clock
- First processors are mobile quad-core designs
- Ultra-low-power (ULP) platform was displayed at Computex: Using a multi-chip-module design, with TDP between 8 and 15 W
- Mass production started in Q3 2019
- Uses a brand-new CPU core design codenamed "Sunny Cove"
- Adds AVX512 instructions (so far available only on HEDT platform, since Skylake-X). New instructions: AVX512F, AVX512CD, AVX512DQ, AVX512BW, and AVX512VL. New commands: AVX512_IFMA and AVX512_VBMI
- 20-30 broadening of various number crunching resources, wider execution window, more AGUs
- SHA-NI and Vector-AES instruction sets, up to 75% higher encryption performance vs. "Skylake"
- Supports unganged memory mode
- First implementation will not be for a desktop processor, but a low-power SOC for notebooks (Ice Lake-U)
- Ice Lake-U is 4-core/8-thread based on Sunny Cove w/ Gen 11 GT2 graphics with 64 EUs.
- Ice Lake SP are Xeons, which will launch in 2020.
- Integrated GPU based on new Gen11 architecture, up to 1 TFLOP/s ALU compute performance
- Integrated GPU supports DisplayPort 1.4a and DSC for 5K and 8K monitor support
- Gen11 also features tile-based rendering, one of NVIDIA's secret-sauce features
- Integrated GPU supports VESA adaptive V-sync, all AMD FreeSync-capable monitors should work with this
Intel Willow Cove and Golden Cove Cores
- Release Date: 2020 and 2021
- Succeeds "Sunny Cove"
- Willow Cove improves on-die caches, adds more security features, and takes advantage of 10 nm+ process improvements to increase clock speeds versus Sunny Cove
- Golden Cove will add significant single-thread (IPC) increases over Sunny Cove, add on-die matrix multiplication hardware, improved 5G network-stack HSP performance, and more security features than Willow Cove
Intel Tiger Lake [updated]
- Release Date: 2020
- Mobile chip, succeeds "Lakefield"
- CPU cores based on Willow Cove
- Will be used in "Ghost Canyon" NUC
- Intel Core i9-9980HK processor
- 28 W TDP
- PCI-Express Gen 4
- Integrated GPU based on Intel Xe architecture (not Gen 11)
- Cache size increased from 2 MB per-core to 3 MB per-core, so total 12 MB
- AVX512 supported
- Uses 10 nm+ process
- "Next-gen I/O"
Intel Tremont / Snow Ridge
- Release Date: 2020
- Pentium Silver SoC
- Successor to Goldmont
- Adds L3 cache
- integrated GPU
- 10 nanometer
Graphics / GPUs
NVIDIA GeForce GTX 1650 Ti [updated]
- Release Date: Probably Q4 2019
- Price: between $170 and $200
- Based on 12 nm Turing TU117 silicon with all shaders unlocked
- 1024 to 1280 CUDA cores, 32 ROPs, 64 TMUs
- 4 GB GDDR5 128-bit memory at 8000 MHz (same as GTX 1650)
- Lacks Raytracing and DLSS
- No reference design from NVIDIA
NVIDIA GeForce GTX 1660 Super [added]
- Release Date: Oct 29th 2019
- Identical to GTX 1660, just with GDDR6 memory instead of GDDR5
- 1408 CUDA Cores
- PCB designs should be mostly identical to GTX 1660 Ti, which uses GDDR6, too, but with more shaders
AMD Radeon RX 5500 / Navi 14 [added]
- Release Date: Q4 2019
- Announced: Oct 7th 2019
- Based on Navi 10 RDNA architecture
- 7 nanometer
- 22 Compute Units = 1408 shaders, 88 TMUs, 32 ROPs
- Base clock: 1670 MHz, Game Clock: 1717 MHz, Boost up to 1845 MHz
- 8 GB GDDR6, 128-bit, 1750 MHz
- 6.4 billion transistors, 158 mm² die size
- Designed to compete with NVIDIA's GTX 1660 / Ti
AMD Radeon RX 5800 / Navi 12 [updated]
- Release Date: 2020
- "Big GPU"
- Based on Navi 10 RDNA architecture
- 7 nanometer
- Estimates: 4096 shaders, GDDR6, 256-bit
- Designed to compete with NVIDIA's TU104 (RTX 2070S / 2080 / 2080S)
AMD Radeon RX 5300 XT [added]
- Release Date: October 2019
- Mentioned in some product listings from HP
- Possibly Polaris-based rebrand (RX550 / RX560)
AMD MI-NEXT
- Release Date: Unknown
- Successor to Vega 20
AMD Arcturus / RDNA 2
- Release Date: 2020
- TSMC, 7 nm+
- Adds hardware raytracing acceleration
Intel XE Discrete Graphics [updated]
- Release Date: mid-2020
- Announcement: Earlier, could even be CES 2020
- First Intel Discrete GPU since ill-fated Larrabee
- New architecture built from the ground up, and not an upscale of Gen 11
- Up to 2x performance uplift for Intel Xe integrated graphics over previous Gen 11
- Could be produced at Samsung to leverage their 10 nm tech, while Intel ramps up its own
- Raytracing hardware acceleration support will definitely be included on the data-center GPUs (and probably on the consumer models, too)
- Double-digit TFLOP/s scaling all the way up to 0.1+ PFLOP/s
- Will be used in upcoming Cray Aurora Supercomputer for Argonne National Laboratory in 2021
- Targeting a wide segment of markets, including consumer (client-segment) graphics, enthusiast-segment, and data-center compute
- Uses new graphics control panel that's being introduced during 2019
Intel Discrete GPU / Arctic Sound
- Release Date: 2020
- Intel will hold a world tour in 2019, to build enthusiasm for the new architecture
- Advanced management for power and clocks
- Test chip: 8x8 mm² die area, 1.54B transistors, 14 nm, 50-400 MHz clock, EUs at 2x clock if needed
- Raja Koduri who left AMD in late 2017 is somehow involved
- Confirmed to support VESA Adaptive Sync
Intel Jupiter Sound
- Release Date: 2022
- Discrete GPU
- Produced on 10 nanometer production process
- Successor to Arctic Sound
Chipsets
Intel X399
- Release Date: unknown
- Supports Coffee Lake-X and Cannon Lake-X
Intel X499 / X299G
- Release Date: Late 2019
- Will be used with Intel's new Core X HEDT processors, probably Cascade Lake X
- Apparently renamed from X499 to X299G — At Computex Gigabyte showed motherboards with "X499" print covered by "X299G" stickers
Intel X599
- Release Date: Unknown
- Supports new Intel 28-core HEDT platform
- New motherboards, with new socket: LGA3647
- Based on C629 Server Chipset
- 6-channel memory
- 48 PCIe lanes
Intel Z399
- Release Date: Unknown
- New HEDT chipset
- Sibling chipset to X599
- Socket LGA2066
- For 20- and 22-core CPUs
- Works with existing Skylake-X LCC and HCC chips
Intel 400 Series Chipsets [updated]
- Release Date: Unknown
- Models: Z490, H470, Q470, B460
- Socket LGA1200
- For 10-core Comet Lake processors
Intel 495 Series Chipsets
- Release Date: Unknown
- Chipset lineup for use with Ice Lake processors
AMD B550 & A520 Chipsets [updated]
- Release Date: Q1 2020
- Supports Ryzen 3000 Zen 2 processors
- Lower cost motherboard option for Zen 2
- PCI-Express 3.0 (not 4.0)
- 2x USB 3.2 Gen2, 6x USB 2.0, 4 + 4 SATA3
- Socket AM4
- Designed by ASMedia
AMD B550A Chipset [added]
- Release Date: Q4 2019
- Supports Ryzen 3000 Zen 2 processors
- Rebranded version of B450 chipset for low-cost motherboards, targeted at OEMs
- PCI-Express 3.0 (not 4.0)
- Socket AM4
AMD TRX40, TRX80 & WRX80 Chipsets [updated]
- Release Date: Q4 2019
- Supports Threadripper 3rd Gen
- Not compatible with 1st and 2nd generation Threadripper
- PCI-Express 4.0
- Socket TR4/SP3
- Quad-channel memory on TRX40
- Eight-channel memory on TRX80 and WRX80
- WRX80 adds some server/enterprise features from the EPYC line
Memory
DDR5 System Memory
- Release Date: Late 2019/2020
- JEDEC standard not fully complete yet, expected for summer 2018
- Demo'd in May 2018 by Micron: DDR5-4400
- Samsung 16 Gb DDR5 DRAM developed since February 2018
- Samsung has completed functional testing and validation of a LPDDR5 prototype: 10 nm class, 8 Gbit, final clocks: DDR5-5500 and DDR5-6400
- SK Hynix has 16 Gb DDR5-5200 samples ready, 1.1 V, mass production expected 2020
- 4800 - 6400 Mbps
- Expected to be produced using 7 nm technologies
- 64-bit link at 1.1 V
- Voltage regulators on the DIMM modules
HBM2e Graphics Memory
- Release Date: 2019
- Offers 3.2 Gbps per pin (33% faster than HBM2)
- Samsung Flashbolt: 16 Gb per die, 8-layers stacked, 16 GB per chip with 410 GB/s bandwidth
- Hynix: 460 GB/s, 3.6 Gbps, eight 16 Gb chips are stacked for a single 16 GB chip
HBM3 Graphics Memory
- Release Date: Not before 2019
- Double the memory bandwidth per stack (4000 Gbps expected)
- Expected to be produced using 7 nm technologies
Silicon Fabrication Tech
TSMC 7 nanometer+ [added]
- Release Date: Q4 2019
- TSMC N7+ is successor to original 7 nm node
- Uses EUV (Extreme Ultra Violet)
- 15-20% more density and improved power consumption over N7
TSMC 6 nanometer [updated]
- Release Date: Unknown
- Backwards compatible with 7 nm process — no new design tools needed
- Uses EUV (Extreme Ultra Violet), up to four EUV layers
- 18% higher logic density than N7
TSMC 5 nanometer [updated]
- Release Date: March 2020 to tape-out customer designs
- Risk production as of Q2 2019
- Uses TSMC's second implementation of EUV (Extreme Ultra Violet)
- Up to 1.8x the density of 7 nm
- +15% higher clocks
Samsung 6 nanometer
- Release Date: Unknown
- First product taped out as of Q2 2019
- Uses EUV (Extreme Ultra Violet)
- Special variant for customers
Samsung 5 nanometer
- Release Date: Unknown
- Ready for customer sample production as of Q2 2019
- Uses EUV (Extreme Ultra Violet)
- Up to 25% the density of 7 nm
- 20% lower power consumption
- 10% higher performance
Intel 7 nanometer
- Release Date: Planned for 2021
- Succeeded by 7 nm+ node in 2022, and 7 nm++ in 2023
- Uses EUV (Extreme Ultra Violet)
- 4x reduction in design rules
- Planned to be used on multiple products: CPU, GPU, AI, FPGA, 5G networking
Other
Hynix 4D NAND
- Release Date: H1 2019
- Developed by SK Hynix
- Sampling in Q4 2018
- Reduces chip physical size, while increasing capacity at the same time
- Supports TLC and QLC
- 30% higher write and 25% higher read performance
- 1.2 V
- 1st generation: 96 stacks, 1.2 Gbps per pin, 512 Gbit TLC
- 128 stacks in development, scales up to 512 stacks
Toshiba 5-Bit-per-Cell NAND Flash (PLC)
- Release Date: Unknown
- Stores an additional bit of information per cell (compared to QLC)
- 32 states per cell
- Will enable even cheaper SSDs, probably with a performance cost
Toshiba XL-Flash
- Developed by Toshiba
- Uses existing SLC flash technology to improve latencies
- 1/10th the read latency of TLC
- Good for random IOPS and better QoS at shallow queue depth
- Can combine SLC and TLC/QLC for tiered, cost-optimized storage
- Intel Optane memory competitor
- 128 gigabit (Gb) die (in a 2-die, 4-die, 8-die package)
- 4 KB page size for more efficient operating system reads and writes
- 16-plane architecture for more efficient parallelism
- Fast page read and program times
Micron 128-layer 3D NAND Flash [added]
- Release Date: 2020, taped out as of Q4 2019
- CMOS-under-array design, but with Replacement Gate (RG) Technology instead of Floating Gate
- Only for few applications, more focused on next-generation RG tech, which brings down cost, too
Toshiba 128-layer 3D NAND Flash
- Release Date: 2020 or 2021
- Developed by Toshiba and partner Western Digital
- Called BiCS 5
- Cells are TLC (not QLC)
- Chip density: 512 Gb
- Write performance per channel doubled to 133 MB/s
SK Hynix 128-layer 3D NAND Flash
- Release Date: H2 2019
- Up to 1 Tb TLC flash per chip
- Data rate up to 1400 Mbps at 1.2 V
- Products will be 2 TB client SSD with in-house controller and 16 TB / 32 TB NVMe datacenter SSDs.
Intel CXL Interconnect
- New interconnect for high-bandwidth devices like GPUs
- Targeted at enterprise and servers
- Competitor to NVLink, Infinity Fabric and PCI-Express
- Uses PCIe physical layer
- Link layer designed for low latency
- 32 Gbps per lane, per direction (Like PCIe Gen 5.0)
PCI-Express 5.0
- Specification released end of May 2019
- Products not expected before 2020
- 32 GT/s bandwidth per lane, per direction (4x the bandwidth of PCIe 3.0)
- 128/130 bit encoding (= 1.5% overhead)
- Implements electrical changes to improve signal integrity and mechanical performance of connectors
- Physical connector is backward compatible
- Signalling is backward compatible with all previous PCIe versions
PCI-Express 6.0
- Specification targeted for 2021
- 64 GT/s raw bit rate, up to 256 GB/s with x16
- Includes low-latency Forward Error Correction (FEC) with additional mechanisms to improve bandwidth efficiency
- Maintains backwards compatibility with all previous generations of PCIe technology
USB 4.0
- Release Date: End of 2020
- Specification Released: September 2019
- Conceptually similar to Thunderbolt 3
- Up to 40 Gbps speeds using two-lane operation
- Multiple data and display protocols can share bandwidth
- Uses USB Type-C connector
- Backwards compatible with USB 2.0, 3.0, 3.1, 3.2 and Thunderbolt 3
- Resulting connection scales to the best mutual capability of the devices being connected