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AMD Could Release Next Generation EPYC CPUs with Four-Way SMT

AleksandarK

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AMD has completed design phase of its "Zen 3" architecture and rumors are already appearing about its details. This time, Hardwareluxx has reported that AMD could bake a four-way simultaneous multithreading technology in its Zen 3 core to enable more performance and boost parallel processing power of its data center CPUs. Expected to arrive sometime in 2020, Zen 3 server CPUs, codenamed "MILAN", are expected to bring many architectural improvements and make use of TSMC's 7nm+ Extreme Ultra Violet lithography that brings as much as 20% increase in transistor density.

Perhaps the biggest change we could see is the addition of four-way SMT that should allow a CPU to have four virtual threads per core that will improve parallel processing power and enable data center users to run more virtual machines than ever before. Four-way SMT will theoretically boost performance by dividing micro-ops into four smaller groups so that each thread could execute part of the operation, thus making the execution time much shorter. This being only one application of four-way SMT, we can expect AMD to leverage this feature in a way that is most practical and brings the best performance possible.


AMD isn't the first to implement this kind of solution to its processors. IBM has been making CPUs based on POWER ISA for years now that feature four or even eight-way SMT and they are one of the key reasons why POWER CPUs are so powerful. Nonetheless, we can hope to see more details about Zen 3 core design decisions as we approach 2020 and launch of Milan CPUs.

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Ho-ly SMT batman

They're on a roll!

256T... o_O

@SKBARON nice catch!
 
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As a dum dum, does this basically mean 4 threads to a core instead of 2, or is this access to 4 threads per core instead of 2?
 
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As a dum dum, does this basically mean 4 threads to a core instead of 2, or is this access to 4 threads per core instead of 2?

It means an 8 core CPU would have 32 threads. Windows would see 32 "cores" in task manager though (once you set the view to all cores)
 
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Doesn't anyone watch Moore's laws deads videos on here, his leak gave him smt4 leaked weeks ago?
 
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I have said it before and I will say it again. AMD is innovating the CPU space like no one before. I fully expect Intel to respond but 4 way SMT is no joke, especially with the 20% increase in transistor density due to EUV.

Doesn't anyone watch Moore's laws deads videos on here, his leak gave him smt4 leaked weeks ago?

I find him to a little too AMD biased
 
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Extremely Ultra Violent against Intel since they still insist on making their CPUs.
 
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Doesn't anyone watch Moore's laws deads videos on here, his leak gave him smt4 leaked weeks ago?
This leak /rumour has been floating about for a few months now at least
 
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YESSSSS! This is exactly what I was hoping for! IBM helped AMD with their SMT implementation and I figured in the future they'd go this route eventually instead of just increasing core counts (which are at massive amount now). There's an excellent article on Anandtech about how well IBM's SMT scales:
132596
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.

Are you F stupid?? When did intel implement 4 way smt??
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.

Can you please link to 4 way hyperthreading parts Intel has available, since AMD is just copying them? I would love to read about this mythical part that has somehow avoided public knowledge.
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.


Can I have some of what you are smoking?

AMD is fabless, so they relay on whatever node size is available. Your likening them to Intel is about as accurate as saying only Ferraris go fast with Premium +++ fuel.

Apple doesn't design much, they use ARM designs and check boxes for what options to include.

Intel doesn't have 4 way SMT, they have security plagued prefetch, speculative and branch prediction issues that AMD doesn't due to their willingness to ignore security for higher IPC. Lastly Intel's Fab issues are theirs, they own the fab that can't produce lower pitch yields at acceptable loss rate, and frequency to power scaling.
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.

So Intel has had quad SMT. Too bad there are no CPUs from Intel like that. I am not sure about the density argument either as the 2600k had 995 million transistors vs the FX 8350 with 1200 Million. So let's look at a more modern CPU The 8700K has approx 2.1 billion transistors vs the R7 2700x 4940 Million. The ++++ from AMD is different from Intel EUV is a brand new lithography and even thought they will be 7nm they will have 988 million more transistors.

If you are saying nothing AMD is new then how many 7nm CPUs does Intel have? How many 16 core desktop CPUs does Intel have? How many viable IGPU CPUs does Intel have? It is funny that you mention Apple when AMD is one of their suppliers. I guess RDNA is also based on turing too right?
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.

When did Intel:
chiplet architecture.
Infinity fabric.
One chip fits all needs (Entry level desktop to top of the line server)
smt4 (still rumor stage)
CCX design.

Amd's 14NM was way way inferior to Intel's in density, performance and everything and still managed to pretty much match Intel's efficiency.
 
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The future is now.
 
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With 4 way smt, I guess if it comes to threadripper. Threadripper can really rip some threads then.

None the less, interesting stuff. I wount be surprised if it only comes to epyc and threadripper for a start and then maybe ryzen in a near future. If amd comes with 4 way smt on ryzen as well on 16 core+ CPU like ryzen 9 4950X . That's 64 threads on just the little socket. Imagine 64 threads in task manager right before your eyes. That's like porn for geeks:respect:.
 
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Can I have some of what you are smoking?

AMD is fabless, so they relay on whatever node size is available. Your likening them to Intel is about as accurate as saying only Ferraris go fast with Premium +++ fuel.

Apple doesn't design much, they use ARM designs and check boxes for what options to include.

Intel doesn't have 4 way SMT, they have security plagued prefetch, speculative and branch prediction issues that AMD doesn't due to their willingness to ignore security for higher IPC. Lastly Intel's Fab issues are theirs, they own the fab that can't produce lower pitch yields at acceptable loss rate, and frequency to power scaling.
To be fair here, Apple is the last ARM CPU designer that "just uses ARM designs" would apply to. Mediatek uses stock ARM designs, Qualcomm alternates, soem chips use stock ARM designs, some use custom cores. Apple's A series have used custom designed cores since the A5, and they are generally regarded as far more powerful then competitor's CPU designs based on ARM. They are one of only two phone companys with a CPU design arm (the othe rbeing samsung). They also design their own mobile GPU, now they have their own power control hardware, ece.

Ironically, BOTH companies he accused of "just copying" have done far more measurable work in their fields then the competition has done, CPU wise at least.
 
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Don't forget Huawei, they also make their own mobile SoCs (HiSilicon is their VLSI division).
 
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So, they are now just doing what INTEL has been doing all along, except for the die shrinkage issue. More density is what INTEL has had Over AMD up until now.

NOTHING Innovative about that, at all. AND Amd is about to even start using the +++ HA HA!

AMD, just like apple, nothing new, just copy other peoples ideas and claim as if they thought of it themselves.
You've just made yourself look completely foolish, I don't even have to do that for you, well done sir, it takes a special kind of idiot to be that good :nutkick:
 
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