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AMD Curve Optimizer any guides / experience

You should only need LLC when running manual all core clocks no? Like 1 clock 1 voltage?
 
You should only need LLC when running manual all core clocks no? Like 1 clock 1 voltage?
Before I started down this path, I read several 5000's series overclocking guides, watched several overclocking guide videos, and even read this WHOLE thread. Several of the guides recommended LLC + Curve Optimizer both lower voltage. Given that I now have one core in the positive, I think the LLC and PBO might work better for a golden chip. Mine is not that.
 
I should get on that.. I haven't watched any videos, just a little on reddit and some scraps of info that google gave me.
 
I should get on that.. I haven't watched any videos, just a little on reddit and some scraps of info that google gave me.
This curve optimizer stuff is not inutitive. I was mainly searching for a way to test each core efficiently. To be honest, I found the best information in scattered throughout this thread. I didn't see anything about Core Cycler elsewhere.
 
This curve optimizer stuff is not inutitive.
Well.. its just tedious. Once I started getting closer to the 0 mark in CO I gave up lol. It does what I need it to do.. no errors anywhere, no bad files, no bad logs.. seems ok to me! The heaviest of loads like Linpack run at 4500, a little lighter with OCCT at about 4750, TM5 runs at 4850, SuperPi runs at 5100-5150, Cinebench runs at about 4700, F@H runs at 4550-4650. If my limits aren't where they should be I don't see that 5150 and if I do it crashes. If it can hold that 5150 it should be good everywhere else.. maybe.
 
I almost left curve optimizer alone for much better than stock performance. I really wanted the pleasure of having tuned the chip.

Heavy loads aren't helpful for testing your CO. By everything I have read, you want a light load that minimizes heat encouraging your cpu to hit the highest core clocks. Heavier loads may run hotter, preventing it from reaching higher core clocks where edge cases might be found.

Oddly enough, one of the best stability tests is windows recovery. Core Cycler makes it easy by automating the testing of each core.

If it is too tedious for you, that's fine. Enjoy the performance and go play games rather than tinker and tune.
 
Heavy loads aren't helpful for testing your CO. By everything I have read, you want a light load that minimizes heat encouraging your cpu to hit the highest core clocks. Heavier loads may run hotter, preventing it from reaching higher core clocks where edge cases might be found.
Normally that would be true. And you would see that while setting your PPT TDC and EDC. Its about balance with the bigger chips. With my 5600 I set it to my max all core clock and let er rip with Linpack. I took note of what it was pulling, and added those values in bios. I was then able to set -30 and she boosts and holds 4850 for just about everything. Heavy stuff still dips to 4650-4750, but not under.. shit now I have to plug it in again to make sure I am not full of shit. Pretty sure it doesn't go under 4650.. my 5900 was way different, the way I did my 5600 was not working at all for the 5900. I had to take to google for that one :D
 
Normally that would be true. And you would see that while setting your PPT TDC and EDC. Its about balance with the bigger chips. With my 5600 I set it to my max all core clock and let er rip with Linpack. I took note of what it was pulling, and added those values in bios. I was then able to set -30 and she boosts and holds 4850 for just about everything. Heavy stuff still dips to 4650-4750, but not under.. shit now I have to plug it in again to make sure I am not full of shit. Pretty sure it doesn't go under 4650.. my 5900 was way different, the way I did my 5600 was not working at all for the 5900. I had to take to google for that one :D
With curve optimizer you are telling each core to run at a lower voltage allowing that core to boost higher. At a certain point, you won't have enough voltage to run the peak boost clocks stable.

That is why when messing with CO, you want a light load. You want a work load that can push the cpu to peak boost clocks because you may have instability there.

That is why CO is so tedious. You need to test each core at its peak boost clock which is a moving target.

To make things worse for me, I will probably need to do all this stability testing again when I begin watercooling. Cooler temperatures will allow PBO to push the clocks further and more consistently. Settings that may have been stable on air because I couldn't sustain high enough boost clocks to trigger an error.

EDIT:
You should only need LLC when running manual all core clocks no? Like 1 clock 1 voltage?

I tried LLC level 3 on and off. It didn't matter for benchmarks or stability. I still have a positive offset with and without it on. I am going to leave it off going forward.
 
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With the stock clock range I get errors @ -30 CO on my 5900. After that I just didn't care too much. I don't think windows uses the cores the way core cycler does, not even remotely..
The second best core according to windows is actually my worst and the only one that can't run -30 at +200. Dunno where win get their info from...
 
One thing I have learned is if one of the cores fails to pass a stability check, go down by at least two. Going up or down by one is a pointless endeavor.

Having gone through this process, I think I might prefer the strategy I read earlier on in the thread to only move in increments of 5. If - 15 fails go down to - 10.

My two best cores according to Ryzen master both have positive offsets. Why can't I ever win the silicone lottery?
 
One thing I have learned is if one of the cores fails to pass a stability check, go down by at least two. Going up or down by one is a pointless endeavor.

Having gone through this process, I think I might prefer the strategy I read earlier on in the thread to only move in increments of 5. If - 15 fails go down to - 10.

My two best cores according to Ryzen master both have positive offsets. Why can't I ever win the silicone lottery?
I apparently won the silicon lottery on my 5600X which does +200 at -30 CO (except one core at -28) and IF does 2066, BUT my ram is shit and barely does 4000cl16 at 1.47V at 2T. Guess you can`t win all ;) My Ryzen 3600 was horrible, best allcore it could do was 4.1@1.25V, I never saw it boosting to 4.2 and all core stock it ran 3.95 :P
 
One thing I have learned is if one of the cores fails to pass a stability check, go down by at least two. Going up or down by one is a pointless endeavor.

Having gone through this process, I think I might prefer the strategy I read earlier on in the thread to only move in increments of 5. If - 15 fails go down to - 10.

My two best cores according to Ryzen master both have positive offsets. Why can't I ever win the silicone lottery?

Hence why 10 of my cores are multiples of 5 :D

My 3700X was bronze (if bronze = soggy cardboard), my 4650G was bronze, my 5900X is bronze, and I can't be arsed to find out where the all-core for my 5600G is.

Side note, I am a little bit crazy with requiring 4x or 5x iterations of 68 minute All FFTs for every core. However, I'm not entirely crazy. When Cezanne is unstable, it starts rattling off Cache Hierarchy event 19. And I DO MEAN rattling off. I never saw this level of error reporting on the 5900X, must be an APU thing.

You don't have to be visibly unstable in Corecycler to start collecting these - I'm still testing the default 6 minute config of Huge FFTs, and this is on like Iteration #6 with no errors in the test. So be very discerning as to the configuration you use in Corecycler, that's why the config.ini is there.

cache hierarchy.png
cache hierarchy 2.png


There's probably 200-300 WHEAs in there from the past 2 days alone. Every single one of them is Cache Hierarchy, so it's pretty obvious what's going on.

When I ran overnight, I think Core 1 survived something like 24 iterations before it started erroring out in the test. But we all know that's bullshit, because Event Viewer looks like a money printer. That's why I'm going back to the 68 minute config after the default testing.
 
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given up on core cycler. the true test is youtube/SoTTR. when playing with CO i use the SWAG principle aka scientific wild ass guess. still get all kinds of errors and so forth. if it doesn't bloo screen i ain't going to check event viewer.
 
My Core 0 and Core 1 are both at +15 now. Core Cycler keeps flagging them as having errors. This is getting absurd. Either I have the worst CPU ever or the testing methodology is flawed.
 
My Core 0 and Core 1 are both at +15 now. Core Cycler keeps flagging them as having errors. This is getting absurd. Either I have the worst CPU ever or the testing methodology is flawed.

What does OCCT say? If you're running PBO with +200MHz override I suppose you might have less impressive offsets.
 
Overclocking my 5600x don't work, leave PBO on auto and forget it, same as my RAM, utter shite RAM I have.
 
Jumping into this thread since I recently got a 5900x. I went through the (painful) process of going one core at a time, starting at -30 and walking it back by 5 until each one could go through an hour of single core OCCT without errors. Took forever, but found those limits. Despite breezing through stress tests, my system was nearly guaranteed to crash within 90 seconds of sitting idle. The actual WHEA errors aren't much help, they tend to point to the same core regardless of if I set that core to -20, 0, or +5, so it seems to be a misleading manifestation of instability elsewhere. Without a better indication of which core is causing the trouble, I decided I would just blindly add +1 to every core's offset whenever it crashed. I've had to do that 3 times so far but I think I'm just about stable now.

Is there a better way to do this? Stress testing doesn't seem useful because if power consumption is on a curve, my issues seem to be toward the bottom of the curve so there's not enough voltage when the core is doing very little.
 
What does OCCT say? If you're running PBO with +200MHz override I suppose you might have less impressive offsets.
I haven't tried OCCT. I am not even running an offset. It is only boosting upto about 4900mhz.When I get back home I am going to turn everything to stock and see if I still have errors. Some cores can boost upto 5050mhz at -10 and lower in curve optimizer.
Is there a better way to do this?
We have Core Cycler, OCCT, and the wait and see approach.
 
Overclocking my 5600x don't work, leave PBO on auto and forget it, same as my RAM, utter shite RAM I have.

Twas the story with my 3700X and 4650G, effects of [very] poor silicon quality.

Jumping into this thread since I recently got a 5900x. I went through the (painful) process of going one core at a time, starting at -30 and walking it back by 5 until each one could go through an hour of single core OCCT without errors. Took forever, but found those limits. Despite breezing through stress tests, my system was nearly guaranteed to crash within 90 seconds of sitting idle. The actual WHEA errors aren't much help, they tend to point to the same core regardless of if I set that core to -20, 0, or +5, so it seems to be a misleading manifestation of instability elsewhere. Without a better indication of which core is causing the trouble, I decided I would just blindly add +1 to every core's offset whenever it crashed. I've had to do that 3 times so far but I think I'm just about stable now.

Is there a better way to do this? Stress testing doesn't seem useful because if power consumption is on a curve, my issues seem to be toward the bottom of the curve so there's not enough voltage when the core is doing very little.

Welcome to TPU :lovetpu:

What are the actual WHEA errors though? Cache Hierarchy/L1 error should be the ones that result from unstable Curve Optimizer. Bus/Interconnect and Unknown are usually symptoms of Infinity Fabric, so it'd help to know what IF/RAM setup you're running to rule that out first.

But if it is a cores issue, from what you're describing it sounds like an idle voltage issue. Laziest fix is to disable Global C-states and Power Supply Low Current Idle (set to Typical), but really just a band-aid remedy. Have you tried testing stability at no PBO and no offset?

I haven't tried OCCT. I am not even running an offset. It is only boosting upto about 4900mhz.When I get back home I am going to turn everything to stock and see if I still have errors. Some cores can boost upto 5050mhz at -10 and lower in curve optimizer.

We have Core Cycler, OCCT, and the wait and see approach.

Perhaps run a quick diagnosis test in CTR and see what it says on quality? Dunno if all-core quality correlates with ST quality, but it's worth a shot. If it comes back with a Bronze sample and pretty low recommendations for all-core OC, might need to lower expectations a bit.

Actually now that I think about it, CTR should be a decent test. All-core stability is usually dictated and limited by your worst core(s), those are also the ones you will need to pay attention to in CO.

you need to be at stock for CTR, CO will skew your results
 
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For my 5600X it was simple. Set it to all cores -25, fail. -20 fail again, -15 success, it has been running like this since Gigabyte released the AGESA update.
 
Occt is quick. In less than one hour I had all dialled in, been stable since.
 
What are the actual WHEA errors though? Cache Hierarchy/L1 error should be the ones that result from unstable Curve Optimizer. Bus/Interconnect and Unknown are usually symptoms of Infinity Fabric, so it'd help to know what IF/RAM setup you're running to rule that out first.
Thanks for explaining that because I've never seen this stated anywhere before but it matches my experience in trying to tweak this. The cache hierarchy errors clear up when reducing the undervolt for the stated core but the bus/interconnect ones stick around and the listed core doesn't seem to matter. I'm at 1800/3600 IF/RAM which doesn't seem all that aggressive. Things seem stable at those settings with PBO and CO disabled, or even with PBO set to mobo and CO disabled, so I think its a matter of "wait and see"-ing until I get the right offset values dialed in. Disabling the C states/idle power feels like a bad solution and I think I would just give up on CO before going that route.
 
Thanks for explaining that because I've never seen this stated anywhere before but it matches my experience in trying to tweak this. The cache hierarchy errors clear up when reducing the undervolt for the stated core but the bus/interconnect ones stick around and the listed core doesn't seem to matter. I'm at 1800/3600 IF/RAM which doesn't seem all that aggressive. Things seem stable at those settings with PBO and CO disabled, or even with PBO set to mobo and CO disabled, so I think its a matter of "wait and see"-ing until I get the right offset values dialed in. Disabling the C states/idle power feels like a bad solution and I think I would just give up on CO before going that route.

Disabling Cstates certainly isn't ideal but unless a new BIOS can magically solve the problem or you're willing to RMA there aren't many other options. My former 3700X was an absolute turd that required Cstates disabled on both the cores and IF front. Worked without a hitch as long as that was done.

You should leave Curve Optimizer to the end, work out your RAM and IF first, you need to be assured that any instability you encounter will be cores-related. 3600 isn't that aggressive (I can run 3600 at just 1.0375V VSOC), but I remember Bus/Interconnect being common on 2020 production 5900X/5950X. What's the batch number on yours?

On the IF part, you can head over to the Ryzen thread and we can see if you post up a Zentimings screenshot
 
Perhaps run a quick diagnosis test in CTR and see what it says on quality? Dunno if all-core quality correlates with ST quality, but it's worth a shot. If it comes back with a Bronze sample and pretty low recommendations for all-core OC, might need to lower expectations a bit
Before messing with any bios overclocking, I ran CTR. It says silver sample. Hence why I think there is something wrong with my testing methodology.
 
Before messing with any bios overclocking, I ran CTR. It says silver sample. Hence why I think there is something wrong with my testing methodology.

Probably best to use PBO but manually set default power limits (142/95/140), should have the same effect as PBO off. But leave boost override at +200MHz. You'll still be able to push ST boost clocks to their max with default power limits.

Then if you want higher MT perf you can uncap the power limits later when you know that ST is for sure stable and all you have to test is all-core (which is trivially easy).

Sometimes high PBO power limits can tank ST performance. Still not sure why this is.

Are you still running only 1 minute iterations? It's not really long enough of a window to do much.
 
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