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AMD's Zen Server Platform Naples' Results Appear on SiSoft Sandra Database

Raevenlord

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If AMD's plans come to fruition, the company's efforts with its Zen micro-architecture will bring it back towards competitiveness with Intel not only on consumer chips, but also on the enterprise segment. While the company's consumer efforts are, by and large, the most visible from a consumer standpoint, with great hopes being pinned on it as a means to inject some much-needed dynamism and innovation in the CPU landscape, the most important vector for AMD arguably stands with the enterprise segment - where margins are usually much greater than in the consumer market.





Recently, a slew of benchmarks on SiSoft Sandra's database hit the web, on an AMD Diesel platform (ie, Naples), identified with the name string 4x AMD Diesel Platform, 2S145A4VIHE4_29/14_N, 16 C. Decoding this, it appears we are dealing with four packages of 16 Cores (16 C), whose configuration appears to be a two-socket (2S), two package, 32-core per socket configuration. As such, we're looking here at 64 physical threads, which ges up to 128 logical if you take into account AMD's implementation of Simultaneous Multi-Threading. The processors apparently come in at 1.44 GHz nominal, 2.9 GHz Turbo core speeds (29/14). The benchmark data also seems to point towards known specifications of the Zen architecture, sporting 512 KB of L2 cache per core, and 4 clusters of 8 MB shared L3 (1 cluster of 8 MB per 4 physical cores).

Check the benchmark scores (some of the low results may stem from benchmark incompatibility, such as the low cryptography scores and such) and as always, any leaked benchmarks must be taken with a grain (or lethal dose) of salt.



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very interesting! arent the clocks a bit low though?
 
My Ivy Bridge i5 has aggregate result 216.5 Mpix/s with 4 (non HT) cores at 4.2GHz (in older version of sandra though)
This Zen does 643.37 Mpix/s with 64 threads at 1.44GHz

Let's do some math ...

let's say Zen's SMT has scaling of 1.5 ... that would be 643.37 / 1.5 = 428.91 Mpix/s with 32 (non SMT) cores at 1.44GHz ...
or 428.91 / 8 = 53.61 Mpix/s with 4 cores at 1.44GHz ...
or 53.61 * 4.2 / 1.44 = 156.37 Mpix/s with 4 cores at 4.2GHz

Color me unimpressed


EDIT: I did not calculate in the multi threaded penalty for socket to socket communication, so color me little less unimpressed :laugh: No wait, scratch that, there exists 32 core (64 thread) zen opteron, this probably isn't dual socket board at all :wtf:
Oh look, the text says it has two sockets ... what the derp is wrong with me.
And the count is 64 real cores and 128 including SMT ... oh well it's 234 against 216 despite socket to socket penalty

Color me impressed ... and really tired
 
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My Ivy Bridge i5 has aggregate result 216.5 Mpix/s with 4 (non HT) cores at 4.2GHz (in older version of sandra though)
This Zen does 643.37 Mpix/s with 64 threads at 1.44GHz

Let's do some math ...

let's say Zen's SMT has scaling of 1.5 ... that would be 643.37 / 1.5 = 428.91 Mpix/s with 32 (non SMT) cores at 1.44GHz ...
or 428.91 / 8 = 53.61 Mpix/s with 4 cores at 1.44GHz ...
or 53.61 * 4.2 / 1.44 = 156.37 Mpix/s with 4 cores at 4.2GHz

Color me unimpressed


EDIT: I did not calculate in the multi threaded penalty for socket to socket communication, so color me little less unimpressed :laugh: No wait, scratch that, there exists 32 core (64 thread) zen opteron, this probably isn't dual socket board at all :wtf:
Oh look, the text says it has two sockets ... what the derp is wrong with me.
And the count is 64 real cores and 128 including SMT ... oh well it's 234 against 216 despite socket to socket penalty

Color me impressed ... and really tired

You got there in the end :laugh:
 
well.. yes i know, i read the article. xeons usually go for 2+GigHZ thats why i find this low.

Also they are very early engineer samples.
 
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