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Maxwell and Pascal "secretly" use tile based rasterization

BiggieShady

BiggieShady

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Interesting article that explains Maxwell's gain in efficiency over Kepler on the same 28 nm production node. Pascal continues to use tile based rasterization.

Conclusion is that nvidia renders using 2 levels of hierarchy of tiles, first has variable tile size and second level has fixed tile size but uses some kind of coverage pattern. They do it to keep all data per 1st level tile in on die gpu cache.

http://www.realworldtech.com/tile-based-rasterization-nvidia-gpus/
Tile-based Rasterization in Nvidia GPUs with David Kanter of Real World Tech

Test shader is simple. Draw multiple differently colored triangles over one another and discard any pixel after pixel count threshold percentage that you can control. Watch video to see the effects.

Code is at https://github.com/nlguillemot/trianglebin but I didn't build an executable (don't have Win10 + Win10 SDK which is required) and the build is here (win10 only) https://github.com/nlguillemot/trianglebin/releases
 
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It's been posted and discussed already. Use search before making new threads.
 
FYFI13 said:
It's been posted and discussed already. Use search before making new threads.
Click to expand...
Couldn't find any ongoing discussion about this
 
BiggieShady said:
Pascal continues to use tile based rasterization.
Click to expand...

Whatever Nvidia does, I'm extremely happy with my GTX1070 performance :rockout:
And AMD has no cards out yet to compete with the high-end Pascal cards.
 
I suspect this is still not full tile based rendering the way ARM Mali does, keeping lists of geometry primitives per tile in each hierarchy level. This seems only tiling of a rasterization step.
In pipeline after geometry is done, gpu seems to run full pixel shader with full gpu on each first level tile serially from left to right, top to bottom. Second level could be as well done in immediate rasterization mode but coverage pattern using tiny tiles helps with cache hits - remember, maxwell and pascal have multiple levels of cache in their gpu. Tiles must be appropriately sized by driver to ensure best usage of gpu cache.
 
Does my 670 do this?
It would explain why my 670 performs better than the Radeon 7970 in certain engines.
 
Just tested with Intel HD 4600, it's a traditional immediate rasterization.
 
lol @ "secretly" Yes, it's a huge conspiracy for Nvidia to enrage all the super uber fan boys..lol..
 
D007 said:
lol @ "secretly"
Click to expand...
Well, it is put there for the lols after all.
Although when asked about efficiency gains, nvidia went on about better scheduler, cache and shader module rearrangements, not a peep about this "little" optimization
 
It couldn't be the massive die space gains from the loss of fp compute?
 
Sooo what does this mean then?
 
ZoneDymo said:
Sooo what does this mean then?
Click to expand...
This has been done before, back in early 2000, ST Micro PowerVR Kyro II did Tile based rasterization and could compete the much higher priced nvidia Geforce 2 series immediate based rasterization with way less transistor and cheaper price even without hardware transform and lighting. You can read it on Anandtech review
 
Tile-based rasterization is a Direct3D 12.1 feature. I don't think AMD will support it until Navi.
 
Soo... is this supposed to be some sort of sneaky trick or something? I haven't read into this or even heard of it before today, and I don't really understand what we're talking about here. Is this some sort of hacky trick to artificially inflate performance in specific scenarios or something? Is it Nvidia PR? Are AMD fanboys mad?
 
There should be a Godwin's law for the term fanboy, and it's much, much faster than Godwin's law.
 
Well, there was Kyro that used tile based rendering and it delivered superb performance, too bad it was very crippled on driver front and it had many game problems with rendering. If NVIDIA managed to get tile based fully working on Maxwell and Pascal (which seems to be the case since they aren't more problematic than any other their GPU), even better. Tile based rendering is VERY efficient.
 
ATI/AMD use HyperZ... not that it doesn't do anything at all.
 
Who cares...
 
Ferrum Master said:
ATI/AMD use HyperZ... not that it doesn't do anything at all.
Click to expand...
You mean Hierarchical Z-buffer which is a part of HyperZ tech ... it's only used for early Z rejection which is supported on all gpus even intel's ... the rest of HyperZ is just z-buffer compression and fast clear that dates to the first radeons.
AMD certainly has the know-how to implement tiled based rendering ... and it would benefit their ROPs greatly given how compute heavy their gpus are.
 
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