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AMD AGESA 1.0.0.5C AM5 Enables Fine-grained Control Over Ryzen 7000X3D CCD Priority

ASUS began rolling out Beta UEFI firmware updates for its Socket AM5 motherboards encapsulating AGESA 1.0.0.5 patch-C microcode. This exposes several new options to end-users through the UEFI Setup Program, which gives them greater control over the way the processor prioritizes workload among the two CCDs (CPU complex dies) on 12-core and 16-core Ryzen 7000 series processors, including the upcoming 7000X3D processors.

While AMD is working to release Chipset Software updates that include "3D V-cache Optimization driver" components that introduce OS-level awareness of the asymmetric implementation of 3D V-cache on the 7900X3D and 7950X3D where only one of the two CCDs has the additional cache; these firmware-level options give users control on prioritizing one CCD over the other for workload. The firmware-level optimization is OS-agnostic, so pretty much any OS should benefit from 3D V-cache the way it was intended (where less parallelized workloads such as games are prioritized on the CCD with the 3D V-cache.

AMD Releases AGESA ComboAM4 1.0.0.5 Microcode

AMD formally announced its AGESA ComboAM4 1.0.0.5 microcode. The new microcode is intended to be encapsulated into motherboard UEFI firmware updates and distributed by motherboard- and OEM desktop manufacturers, at their discretion. AGESA 1.0.0.5 improves POST (time) with select Micron Technology DDR4-3200 memory chips. An intermittent virtual memory error with certain Realtek onboard Ethernet PHY chips has been fixed. The microcode also improves PCI-Express bus stability and interoperability, in general. A PCIe lane configuration issue with Ryzen 3 Pro 2100GE has been fixed. Besides these, all other performance- and stability-improvements part of older 1.0.0.4 a/ab/abb/abba microcodes are incorporated into 1.0.0.5. Keep an eye on the BIOS updates section of your socket AM4 motherboard's product page on its company website.
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Apr 26th, 2024 18:53 EDT change timezone

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