High Bandwidth Memory (HBM) is emerging as the preferred solution for overcoming memory transfer speed restrictions due to the bandwidth limitations of DDR SDRAM in high-speed computation. HBM is recognized for its revolutionary transmission efficiency and plays a pivotal role in allowing core computational components to operate at their maximum capacity. Top-tier AI server GPUs have set a new industry standard by primarily using HBM. TrendForce forecasts that global demand for HBM will experience almost 60% growth annually in 2023, reaching 290 million GB, with a further 30% growth in 2024.

TrendForce's forecast for 2025, taking into account five large-scale AIGC products equivalent to ChatGPT, 25 mid-size AIGC products from Midjourney, and 80 small AIGC products, the minimum computing resources required globally could range from 145,600 to 233,700 Nvidia A100 GPUs. Emerging technologies such as supercomputers, 8K video streaming, and AR/VR, among others, are expected to simultaneously increase the workload on cloud computing systems due to escalating demands for high-speed computing.

AMD today announced the AMD Versal Premium VP1902 adaptive system-on-chip (SoC), the world's largest adaptive SoC. The VP1902 adaptive SoC is an emulation-class, chiplet-based device designed to streamline the verification of increasingly complex semiconductor designs. Offering 2X the capacity over the prior generation, designers can confidently innovate and validate application-specific integrated circuits (ASICs) and SoC designs to help bring next generation technologies to market faster.

AI workloads are driving increased complexity in chipmaking, requiring next-generation solutions to develop the chips of tomorrow. FPGA-based emulation and prototyping provides the highest level of performance, allowing faster silicon verification and enabling developers to shift left in the design cycle and begin software development well before silicon tape-out. AMD, through Xilinx, brings over 17 years of leadership and six generations of the industry's highest capacity emulation devices, which have nearly doubled in capacity each generation.

Edge sensors, such as LiDAR, radar and 3D surround-view camera systems, are becoming more prevalent in the automotive market, especially with the growing adoption in autonomous driving. As more sensors are needed for autonomy, there are increasing needs for faster signal processing, reduced device costs and smaller form factors. Functional safety is also critical for many of these autonomous applications.

To address these market needs, we're introducing two additions to our AMD Automotive XA Artix UltraScale+ family: the XA AU10P and XA AU15P cost-optimized processors, which are automotive-qualified and optimized for use in advanced driver-assistance systems (ADAS) sensor applications. The Artix UltraScale+ devices extend the AMD portfolio of automotive-grade, functional-safety proven and highly scalable FPGA and adaptive SoCs, joining the automotive-grade Spartan 7, Zynq 7000 and Zynq UltraScale+ product families.

Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, today announced that its VectorPath accelerator card featuring a Speedster 7t FPGA has been certified by PCI-SIG for PCIe Gen 5 and is the first and only FPGA accelerated CEM add-in card certified for PCIe Gen 5 x16 at 32 gigatransfers per second (GT/s) on the PCI-SIG Integrator's list. VectorPath S7t-VG6 accelerator cards are designed to reduce time to market when developing high-performance compute and acceleration functions for AI, ML, networking and data center applications and are shipping today.

"Achronix continues to drive acceleration in the high-performance FPGA add-in card market," said Craig Petrie, Vice President at BittWare. "Achieving PCI-SIG Gen 5 certification is an important milestone. Our customers can be assured of the highest PCIe bandwidths and have confidence that VectorPath cards will interoperate with Gen 5 servers."

Intel's Programmable Solutions Group today announced that the Intel Agilex 7 with the R-Tile chiplet is shipping production-qualified devices in volume - bringing customers the first FPGA with PCIe 5.0 and CXL capabilities and the only FPGA with hard intellectual property (IP) supporting these interfaces. "Customers are demanding cutting-edge technology that offers the scalability and customization needed to not only efficiently manage current workloads, but also pivot capabilities and functions as their needs evolve. Our Agilex products offer the programmable innovation with the speed, power and capabilities our customers need while providing flexibility and resilience for the future. For example, customers are leveraging R-Tile, with PCIe Gen 5 and CXL, to accelerate software and data analytics, cutting the processing time from hours to minutes," said Shannon Poulin, Intel corporate vice president and general manager of the Programmable Solutions Group.

Faced with time, budget and power constraints, organizations across industries including data center, telecommunications and financial services, turn to FPGAs as flexible, programmable and efficient solutions. Using Agilex 7 with R-Tile, customers can seamlessly connect their FPGAs with processors, such as 4th Gen Intel Xeon Scalable processors, with the highest bandwidth processor interfaces to accelerate targeted data center and high performance computing (HPC) workloads. Agilex 7's configurable and scalable architecture enables customers to quickly deploy customized technology - at scale with hardware speeds based on their specific needs - to reduce overall design costs and development processes and to expedite execution to achieve optimal data center performance.

Introducing Duo - The Higher Energy Analogue System. You've always known what to expect from a video game system. Until now. Duo is an all-in-one reimagining of perhaps the most underappreciated video game systems of all time. Analogue Duo is compatible with nearly every NEC system and game format ever made. TurboGrafx-16. PC Engine. SuperGrafx. TurboGrafx CD. PC Engine CD-ROM. Super Arcade CD-ROM. 1080p. Zero lag. Bluetooth. 2.4 G. Because the last thing a video game system should be is predictable. Completely engineered in FPGA. Analogue OS. No emulation.

We're preserving history with FPGA hardware. Duo is designed with unparalleled compatibility. The core functionality of each system is engineered directly into an Altera Cyclone V, a sophisticated FPGA. We spent thousands of hours engineering each system via FPGA for absolute accuracy. Unlike the knock off and emulation systems that riddle the market today, you'll be experiencing the entire NEC era free of compromises. Duo is designed to preserve video game history, with the respect it deserves.

Tachyum today announced its latest milestone of officially entering the final phase of test and development for the Prodigy Universal Processor. This last stage of Quality Assurance (QA) testing of all necessary ported software on a Field Programmable Gate Array (FPGA) for final testing will ensure the chip is production worthy.

Prodigy is currently running ported software on its software emulation platform. Once all Quality Assurance testing is successfully completed on FPGA, the Prodigy chip will be ready for tape-out this year. This phase of porting and finalizing all necessary software for tape out will ensure that existing applications run seamlessly and deliver industry-leading performance for hyperscale, high-performance computing and artificial intelligence workloads once the Prodigy chip is received from the fabrication house.

The global economy has faced increased inflation risks and downstream inventory corrections in 2H22, which have affected IC design houses faster than wafer foundries, as they are far more sensitive and responsive to market reversals. TrendForce reports that adverse factors such as weak overall consumption, restrictions from China, and the slowdown of corporate IT spending and CSP demand have impacted the revenue performance of the world's top 10 IC design houses in 4Q22, leading to a QoQ decline of 9.2%, or approximately US$33.96 billion.

TrendForce predicts that the revenue of these top 10 companies keep declining—though with a slight convergence—into 1Q23, owing to ongoing inventory corrections across the entire supply chain as well as Q1 being the traditional off-season for consumer demand. Demand will continue to be weak despite new product launches and inventory replenishment in the supply chain.

One of the biggest drawbacks of modern CPUs is that adding more cores doesn't equal more performance in a linear fashion. Parallelism in CPUs offer limited scaling for most applications and even none for some. A South Korean company called Morumi is now taking a stab at solving this problem and wants to develop a CPU that can offer more or less infinite processing scaling, as more cores are added. The company has been around since 2018 and focused on various telecommunications chips, but has now started the development on what it calls every one period parallel processor (EOPPP) technology.

EOPPP is said to distribute data to each of the cores in a CPU before the data is being processed, which is said to be done over a type of mesh network inside the CPU. This is said to allow for an almost unlimited amount of instructions to be handled at once, if the CPU has enough cores. Morumi already has an early 32-core prototype running on an FPGA and in certain tasks the company has seen a tenfold performance increase. It should be noted that this requires software specifically compiled for EOPPP and Moumi is set to release version 1.0 of its compiler later this year. It's still early days, but it'll be interesting to see how this technology develops, but if it's successfully developed, there's also a high chance of Morumi being acquired by someone much bigger that wants to integrate the technology into their own products.

Today, Intel launched Intel Agilex 7 FPGAs with F-Tile, equipped with the fastest field-programmable gate array (FPGA) transceivers available on the market and designed to help customers address challenges across the most bandwidth-intensive areas of the data-centric world, including data centers and high-speed networks. Created with embedded, networking and cloud customers in mind, Intel's new F-Tile-enabled Agilex 7 FPGAs deliver flexible hardware solutions with industry-leading transceiver performance, delivering up to 116 gigabits per second (Gbps) and hardened 400 gigabit Ethernet (GbE) intellectual property (IP).

"Intel's Agilex 7 with F-Tile is loaded with transceivers that deliver more flexibility, bandwidth and data rate performance than any other FPGA on the market today. Together with Intel manufacturing and our supply chain resilience, we're delivering multiple industry-leading products and capabilities that our customers and the industry require to address a broad range of critical business needs," said Shannon Poulin, Intel corporate vice president and general manager of the Programmable Solutions Group.

Magewell has unveiled a new model in its Eco Capture family of ultra-compact, power-efficient, M.2 video capture cards. The new single-channel Eco Capture AIO M.2 provides both HDMI and SDI interfaces with embedded audio support for flexible input connectivity. Magewell will highlight the Eco Capture AIO M.2 and other new innovations in booth C5031 at the 2023 NAB Show in Las Vegas from April 16 to 19.

Magewell's Eco Capture cards offer systems integrators and OEM developers a high-performance video capture solution with low power consumption in a space-efficient form factor. The cost-effective, low-latency devices feature a high-speed PCIe 2.0 bus interface with an M.2 connector and measure just 22x80mm (0.87x3.15 in), making them ideal for incorporation into small, portable or embedded systems where full-sized PCIe slots are not available.

For more than a decade, Intel and its partners have been on a mission to virtualize the world's networks, from the core to the RAN (radio access network) and out to the edge, moving them from fixed-function hardware onto programmable, software-defined platforms, making networks more agile while driving down their complexity and cost.

Now operators are looking to cross the next chasm in delivering cloud-native functionality for automating, managing and responding to an increasingly diverse mix of data and services, providing organizations with the intelligence needed at the edge of their operations. Today, Intel announced a range of products and solutions driving this transition and broad industry support from leading operators, original equipment manufacturers (OEMs) and independent software vendors (ISVs).

In a continuing commitment to enabling industry-leading data acceleration in heterogeneous compute environments, Achronix Semiconductor Corporation, the industry's only independent supplier of high-end FPGAs and eFPGA IP solutions, today announced the production release of its AC7t1500 FPGA and the addition of the power-efficient AC7t800 FPGA to the Achronix Tool Suite.

"The Speedster 7t product family offers unprecedented FPGA-based performance for data acceleration applications," said Steve Mensor, VP of Marketing and Business Development at Achronix. "The release of the AC7t1500 to production along with the addition of the AC7t800 in our ACE design tools gives customers multiple options from this industry-leading, high-performance family that offers FPGA programmability with ASIC-level performance. These advancements give customers confidence that they can design on a robust, validated FPGA product family that meets their high-performance and high-bandwidth needs."

Today, Intel announced the 2023 release of the Intel oneAPI tools - available in the Intel Developer Cloud and rolling out through regular distribution channels. The new oneAPI 2023 tools support the upcoming 4th Gen Intel Xeon Scalable processors, Intel Xeon CPU Max Series and Intel Data Center GPUs, including Flex Series and the new Max Series. The tools deliver performance and productivity enhancements, and also add support for new Codeplay plug-ins that make it easier than ever for developers to write SYCL code for non-Intel GPU architectures. These standards-based tools deliver choice in hardware and ease in developing high-performance applications that run on multiarchitecture systems.

"We're seeing encouraging early application performance results on our development systems using Intel Max Series GPU accelerators - applications built with Intel's oneAPI compilers and libraries. For leadership-class computational science, we value the benefits of code portability from multivendor, multiarchitecture programming standards such as SYCL and Python AI frameworks such as PyTorch, accelerated by Intel libraries. We look forward to the first exascale scientific discoveries from these technologies on the Aurora system next year."
-Timothy Williams, deputy director, Argonne Computational Science Division

Lattice Semiconductor, the low power programmable leader, today unveiled Lattice Avant, a new FPGA platform purpose-built to bring the company's power efficient architecture, small size, and performance leadership to mid-range FPGAs. Lattice Avant offers best-in-class power efficiency, advanced connectivity, and optimized compute that enable Lattice to address an expanded set of customer applications across the Communications, Computing, Industrial, and Automotive markets.

"With Lattice Avant, we extend our low power leadership position in the FPGA industry and are poised to continue our rapid pace of innovation, while also doubling the addressable market for our product portfolio," said Jim Anderson, President and CEO, Lattice Semiconductor. "We created Avant to address our customers' need for compelling mid-range FPGA solutions, and we're excited to help them accelerate their designs with new levels of power efficiency and performance."

Back in September, NVIDIA's Jensen Huang said that Moore's Law is dead, but it seems like AMD disagrees with NVIDIA, at least for now. According to an interview with AMD's CTO, Mark Papermaster, AMD still believes that Moore's Law will be alive for another six to eight years. However, AMD no longer believes that transistor density can be doubled every 18 to 24 months, while remaining in the same cost envelope. "I can see exciting new transistor technology for the next - as far as you can really plot these things out - about six to eight years, and it's very, very clear to me the advances that we're going to make to keep improving the transistor technology, but they're more expensive," Papermaster said.

AMD believes we'll see a change in how chips are being designed and put together, with chiplets being the future of semiconductors. Papermaster calls this "a Moore's Law equivalent, meaning that you continue to really double that capability every 18 to 24 months" although it's not exactly Moore's Law in the traditional sense. AMD also appears to be betting heavily on FPGA technology in some of its market segments, for something the company calls adaptive computing. As to how things will play out, time will tell, but with both AMD and Intel going down the chiplet route, albeit in slightly different ways, we should continue to see new innovations from both companies, with or without Moore's Law.

Xilinx Field Programmable Gate Arrays (FPGAs), now part of AMD, are always in demand in the semiconductor industry. Today, AMD has shared a letter to Xilinx customers that the selected FPGA device series will receive an 8-25% price increase. Citing AMD's investment into the supply chain, along with increased prices from the suppliers, Xilinx FPGAs will get more expensive. From January 9, 2023, the cost of the Spartan 6 series will increase by 25%, the price of the Versal series will not increase, and all other Xilinx products will increase by 8%. Interestingly, the older series manufactured on 40-28 nm nodes will increase while the latest Versal series doesn't experience any change.

Regarding lead times, the 16 nm UltraScale+ series, 20 nm UltraScale series, and 28 nm 7 series all take 20 weeks from order to delivery, which will remain until the third quarter of 2023. You can read the entire document below.

Innodisk, a leading global provider of industrial-grade flash storage, DRAM memory and embedded peripherals, has announced its latest step into the AI market, with the launch of EXMU-X261, an FPGA Machine Vision Platform. Powered by AMD's Xilinx Kria K26 SOM, which was designed to enable smart city and smart factory applications, Innodisk's FPGA Machine Vision Platform is set to lead the way for industrial system integrators looking to develop machine vision applications.

Automated defect inspection, a key machine vision application, is an essential technology in modern manufacturing. Automated visual inspection guarantees that the product works as expected and meets specifications. In these cases, it is vital that a fast and highly accurate inspection system is used. Without AI, operators must manually inspect each product, taking an average of three seconds per item. Now, with the help of AI solutions such as Innodisk's FPGA Machine Vision Platform, product inspection in factories can be automated, and the end result is not only faster and cheaper, but can be completely free of human error.

Intel's upcoming Sapphire Rapids processors have faced multiple delays over the past few years. Built on Intel 7 manufacturing process, the CPU is supposed to bring new advances for Intel's clients and significant performance uplifts. However, TrendForce reports that the mass production of Sapphire Rapids processors will be delayed from Q4 of 2022 to the first half of 2023. The reason for this (yet another) delay is that the Sapphire Rapids MCC die is facing a meager yield on Intel 7 manufacturing technology, estimated to be at only 50-60% at the time of writing. Economically, this die-yielding percentage is not profitable for Intel since many dies are turning out to be defective.

This move will stop many OEMs and cloud service providers (CSPs) from rolling out products based on the Sapphire Rapids design and will have to delay it until next year's mass production. On the contrary, AMD is likely to reap the benefits of Intel's delay, and AMD's x86 server market share will jump from 15% in 2022 to 23% in 2023. Given that AMD ships processors with the highest core counts, many companies will opt for AMD's solutions in their data centers. With more companies being concerned by their TCO measures with rising energy costs, favors fall in the hand of single-socket servers.

Alphawave IP (LSE: AWE), a global leader in high-speed connectivity for the world's technology infrastructure, today announced the successful tapeout of its ZeusCORE100 1-112 Gbps NRZ/PAM4 Serialiser-Deserialiser ("SerDes"), Alphawave's first testchip on TSMC's most advanced N3E process. Alphawave IP will be exhibiting this new product alongside its complete portfolio of high-performance IP, chiplet, and custom silicon solutions at the TSMC OIP Forum on October 26 in Santa Clara, CA as the Platinum sponsor.

ZeusCORE100 is Alphawave's most advanced multi-standard-SerDes, supporting extra-long channels over 45dB and the most requested standards such as 800G Ethernet, OIF 112G-CEI, PCIe GEN6, and CXL 3.0. Attendees will be able to visit the Alphawave booth and meet the company's technology experts including members of the recently acquired OpenFive team. OpenFive is a longstanding partner of TSMC through the OIP Value Chain Aggregator (VCA) program. OpenFive is one of a select few companies with an idea-to-silicon methodology in TSMC's latest technologies, and advanced packaging capabilities, enabling access to the most advanced foundry solution available with the best Power-Performance-Area (PPA). With Alphawave's industry-leading IP portfolio and the addition of OpenFive's capabilities, designers can create systems on a chip (SoCs) that pack more compute power into smaller form factors for networking, AI, storage, and high-performance computing (HPC) applications.

Today AMD (NASDAQ: AMD) announced its collaboration with the Energy Sciences Network (ESnet) on the launch of ESnet6, the newest generation of the U.S. Department of Energy's (DOE's) high-performance network dedicated to science. AMD worked closely with ESnet since 2018 to integrate powerful adaptive computing for the smart and programmable network nodes of ESnet6. ESnet6's extreme scale packet monitoring system uses AMD Alveo U280 FPGA-based network-attached accelerator cards at the core network switching nodes. This will enable high-touch packet processing and help improve the accuracy of network monitoring and management to enhance performance. The programmable hardware allows for new capabilities to be added for continuous innovation in the network.

In order to customize AMD Alveo U280 2x100Gb/s accelerators as network interface cards (NIC) for ESnet6, the OpenNIC overlay - developed by AMD - was used to provide standard network-interface and host-attachment hardware, allowing novel and experimental networking functions to be implemented easily on the Alveo card. OpenNIC has since been open-sourced after being successfully used and evolved by ESnet, as well as various leading academic research groups. Also important for rapid innovation by non-hardware experts was the use of the AMD VitisNetP4 development tools for compiling the P4 packet processing language to FPGA hardware.

AMD Alveo U280 cards, using OpenNIC and VitisNetP4, are being deployed on every node of the ESnet6 network. The high-touch approach based on FPGA-accelerated processing allows every packet in the ESnet6 network to be monitored at extremely high transfer rates to enable deep insights into the behavior of the network, as well as helping to rapidly detect and correct problems and hot spots in the network. The Alveo U280 card with OpenNIC platform also supplies the adaptability to allow the continuous roll-out of new capabilities to the end user community as needs evolve over the lifetime of ESnet6.

On Day 2 of Intel Innovation, Intel illustrated how its efforts and investments to foster an open ecosystem catalyze community innovation, from silicon to systems to apps and across all levels of the software stack. Through an expanding array of platforms, tools and solutions, Intel is focused on helping developers become more productive and more capable of realizing their potential for positive social good. The company introduced new tools to support developers in artificial intelligence, security and quantum computing, and announced the first customers of its new Project Amber attestation service.

"We are making good on our software-first strategy by empowering an open ecosystem that will enable us to collectively and continuously innovate," said Intel Chief Technology Officer Greg Lavender. "We are committed members of the developer community and our breadth and depth of hardware and software assets facilitate the scaling of opportunities for all through co-innovation and collaboration."

Flex Logix Technologies, Inc., supplier of high performance and efficient edge AI inference accelerators and the leading supplier of eFPGA IP, today announced the InferX Hawk - a hardware and software-ready Mini-ITX x86 system designed to help customers quickly and easily customize, build and deploy edge and embedded AI systems. The InferX Hawk system includes the Flex Logix InferX X1 AI accelerator chip, AMD Ryzen Embedded R2314 SoC, InferX Runtime software, and the EasyVision platform running Linux or Windows to deliver an integrated low power, high-performance AI system.

The AMD Ryzen Embedded R2314 delivers performance per watt efficiency using "Zen+" core architecture and Radeon Graphics. With the Hawk Mini-ITX solution, customers can save over six months of hardware and software development time, additional system costs and power over NVIDIA and other solutions.

Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, today announced that their VectorPath accelerator card featuring the Speedster 7t FPGA has been certified by PCI-SIG and added to the CEM Add-In card integrators list supporting PCIe Gen4 x16. The VectorPath S7t-VG6 accelerator card is designed to reduce time to market when developing high-performance compute and acceleration functions for AI, ML, networking and data center applications. The VectorPath accelerator cards are available and shipping today for new orders.

"Achronix is an important, strategic partner for BittWare. The Speedster7t FPGA has an innovative architecture that provides significant differentiation in the high-performance FPGA market segment," said Craig Petrie, VP of sales and marketing at BittWare. "Designers can now use the VectorPath accelerator card in PCIe Gen4-based system with the confidence of PCI-SIG certification."

MIPS, a leading developer of highly scalable RISC processor IP, announced it is working with Intel to accelerate innovation in open computing. As part of this effort, MIPS' eVocore is being incorporated into the new Intel Pathfinder for RISC-V, a platform designed to deliver new capabilities for pre-silicon development. Intel Pathfinder allows new ways for System-on-a-Chip (SoC) architects and system software developers to define new products and pursue pre-silicon software development on RISC-V.

"MIPS is thrilled to be part of the Intel Pathfinder for RISC-V platform, providing high performance cores with support for multi-cluster, multi-core and multi-threading to accelerate innovation," said Desi Banatao, MIPS CEO. "These multiprocessors have unique features and a high level of scalability that make them ideal for compute-intensive tasks across a broad range of markets and applications."