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Montage Technology Samples PCIe 6.x / CXL 3.x Retimer Chips

Montage Technology today announced the customer sampling of its PCIe 6.x/CXL 3.x Retimer -- M88RT61632, which is designed to enhance connectivity performance for demanding high-bandwidth applications such as AI and cloud computing. This milestone extends the company's PCIe product portfolio, building upon its successful PCIe 4.0 and PCIe 5.0/CXL 2.0 Retimer solutions.

The PCIe 6.x/CXL 3.x Retimer delivers excellent performance with data rates up to 64 GT/s, twice that of PCIe 5.0. Powered by Montage Technology's proprietary PAM4 SerDes IP, the chip achieves superior signal integrity with link budget up to 43dB while maintaining low latency. Its innovative DSP architecture effectively addresses PCIe 6.x system design challenges including crosstalk and signal reflection. In addition, the chip features advanced link training and enhanced telemetry, enabling comprehensive link monitoring and fault diagnostics for high-reliability AI cluster deployments.

Credo Announces PCI Express 6/7, Compute Express Link CXL 3.x Retimers, and AEC PCI Express Product Line at OCP Summit 2024

Credo Technology Group Holding Ltd (Credo), an innovator in providing secure, high-speed connectivity solutions that deliver improved energy efficiency as data rates and corresponding bandwidth requirements increase throughout the data infrastructure market, is excited to announce the company's first Toucan PCI Express (PCIe) 6, Compute Express Link (CXL) 3.x and Magpie PCIe 7, CXL 4.x retimers and OSFP-XD 16x 64GT/s (1 Tb) PCIe 6/CXL HiWire AECs. Credo will demonstrate the Toucan PCIe 6 retimers and HiWire AECs at the upcoming Open Compute Project (OCP) Summit October 15-17 in Booth 31 and the OCP Innovation Center.

Building on Credo's renowned Serializer/Deserializer (SerDes) technology, the new PCIe 6 and PCIe 7 retimers deliver industry-leading performance and power efficiency while being built on lower cost, more mature process nodes than competing devices. Credo will also include enhanced diagnostic tools, including an embedded logic analyzer and advanced SerDes tools driven by a new GUI designed to enable rapid bring up and debug of customer systems.

PCI-SIG Exploring an Optical Interconnect to Enable Higher PCIe Technology Performance

PCI-SIG today announced the formation of a new workgroup to deliver PCI Express (PCIe) technology over optical connections. The PCI-SIG Optical Workgroup intends to be optical technology-agnostic, supporting a wide range of optical technologies, while potentially developing technology-specific form factors.

"Optical connections will be an important advancement for PCIe architecture as they will allow for higher performance, lower power consumption, extended reach and reduced latency," said Nathan Brookwood, Research Fellow at Insight 64. "Many data-demanding markets and applications such as Cloud and Quantum Computing, Hyperscale Data Centers and High-Performance Computing will benefit from PCIe architecture leveraging optical connections."

PCIe 7.0 Specification, Version 0.3 Available to PCI-SIG Members

PCI-SIG is pleased to share the PCI Express (PCIe) 7.0 specification, version 0.3 is now available to members. Version 0.3 of the specification indicates that the first review draft of the specification is complete and has received work group approval. This is an important milestone for PCI-SIG, demonstrating we are on plan for a full specification release in 2025.

The PCIe 7.0 specification is targeted to support emerging applications such as 800 G Ethernet, AI/ML, Cloud and Quantum Computing; and data-intensive markets like Hyperscale Data Centers, High-Performance Computing (HPC), Edge and Military/Aerospace.
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Mar 19th, 2025 09:56 CDT change timezone

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