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Intel Lunar Lake Chiplet Arrangement Sees Fewer Tiles—Compute and SoC

Intel Core Ultra "Lunar Lake-MX" will be the company's bulwark against Apple's M-series Pro and Max chips, designed to power the next crop of performance ultraportables. The MX codename extension denotes MoP (memory-on-package), which sees stacked LPDDR5X memory chips share the package's fiberglass substrate with the chip, to conserve PCB footprint, and give Intel greater control over the right kind of memory speed, timings, and power-management features suited to its microarchitecture. This is essentially what Apple does with its M-series SoCs powering its MacBooks and iPad Pros. Igor's Lab scored the motherlode on the way Intel has restructured the various components across its chiplets, and the various I/O wired to the package.

When compared to "Meteor Lake," the "Lunar Lake" microarchitecture sees a small amount of "re-aggregation" of the various logic-heavy components of the processor. On "Meteor Lake," the CPU cores and the iGPU sat on separate tiles—Compute tile and Graphics tile, respectively, with a large SoC tile sitting between them, and a smaller I/O tile that serves as an extension of the SoC tile. All four tiles sat on top of a Foveros base tile, which is essentially an interposer—a silicon die that facilitates high-density microscopic wiring between the various tiles that are placed on top of it. With "Lunar Lake," there are only two tiles—the Compute tile, and the SoC tile.

Intel Lunar Lake Processor Appears in SiSoftware Sandra Benchmark

Intel's next-generation Lunar Lake processor has appeared in the SiSoftware Sandra benchmarking suite, and the online database has revealed many details, thanks to a spotting by @Olrak29 of X/Twitter. Considering Intel's Meteor Lake is still two months away from its launch, the presence of Lunar Lake's benchmarks is indeed intriguing. Interestingly, Intel showcased a Lunar Lake laptop at the Intel Innovation 2023 event, and this SiSoft entry might be related to that demo. The data from SiSoft details the system as a "Genuine Inte l(R) 0000 1.00 GHz (5M 20c 3.91 GHz + 2.61 GHz, 3.3 GHz IMC, 4x 2.5 MB + 4 MB L2, 2x 8 MB L3)," hinting at a "Lunar Lake Client System (Intel LNL-M LP5 RVP1)." Deciphering these details, the Lunar Lake system adopts a 4+4 core configuration, utilizing a mix of Lion Cove and Skymont architecture cores tailored for performance and efficiency.

Moreover, the benchmark report pegs this CPU as a low-power laptop variant with a 17 W TDP. While it operates at a 1.0 GHz base frequency, it reached a speed of 3.91 GHz during the testing. However, these numbers should be taken cautiously since it's likely an engineering sample. Cache details are outlined, suggesting a 2.5 MB L2 cache per P-core, an added 4 MB L2 cache for E-cores, and a 16 MB L3 cache. No details on the integrated GPU were revealed, although it's anticipated that Lunar Lake will house Intel's Xe2-LPG graphics and LPDDR5 system memory. Intel has shared that Lunar Lake is scheduled for a 2024 release in mobile/laptop devices, targeting performance-per-watt leadership. Arrow Lake processors, catering to desktops, might share the core architecture and are anticipated to launch around the same timeframe.

Intel "Panther Lake" Processor to Integrate a "Celestial" Xe3 iGPU

"Panther Lake" is the codename for the microarchitecture behind Intel's 17th Gen Core processors due for 2026-27. It succeeds the 16th Gen "Lunar Lake" (2025-26), 15th Gen "Arrow Lake" (2024-25); and 14th Gen "Meteor Lake" (2023-24) architectures. While very little is known about "Panther Lake," the first piece of information discovered in the LinkedIn profile page of one Intel Graphics engineer, suggests that the graphics tile of the processor will feature an iGPU based on the Xe3 "Celestial" graphics architecture, which is two generations ahead of the current Xe "Alchemist," and one ahead of Xe2 "Battlemage."

Intel's graphics architectures will continue to be highly scalable and modular in their applications, with variants of them scaling between low-power iGPUs to large client discrete GPUs, and very-large HPC-AI processors. The variant for the iGPU powering "Panther Lake" will be Xe3-LPG, a highly skimmed version of the architecture for lower Xe Core counts, with just the right hardware to operate in power-constrained devices such as mobile processors. From the looks of it, Intel will stick with the disaggregated chiplet design for its processor architectures going all the way down to "Panther Lake," as an older company slide detailing the scalability of "Celestial" highlighted a "next platform" processor succeeding "Meteor Lake" and its immediate successor ("Arrow Lake").

Intel Talks "Battlemage" Xe2-LPG and Xe2-HPG Graphics Architectures

Intel in an interview with Hardwareluxx shed more light on its second generation Xe graphics architecture, codenamed "Battlemage." There will be two key variants of "Battlemage,"—Xe2-LPG and Xe2-HPG. The Xe2-LPG (low-power graphics) architecture is a slimmed-down derivative of "Battlemage" that's optimized for low-power. It is meant for iGPUs (integrated graphics), particularly upcoming "disaggregated" Intel Core processors in which the iGPU exists on Graphics Tiles (chiplets). The iGPU powering the upcoming Core "Meteor Lake" processor is rumored to meet the full DirectX 12 Ultimate feature-set (something Xe-LP doesn't), and so it's likely that Xe2-LPG is getting its first outing with that processor. The Xe2-HPG (high performance graphics) architecture is designed squarely for discrete GPUs—either desktop graphics cards, or mobile discrete GPUs hardwired into laptops.

In the interview, Intel talked about how its first-generation Xe graphics IP had at least four separate product verticals based on the scalability of the product, and the specific application (Xe-LP for iGPUs and tiny dGPUs, Xe-HPG for client- and pro-vis discrete GPUs, Xe-HPC for scalar compute processors, and Xe-HP for data-center graphics). The company eventually axed Xe-HP as it felt the Xe-HPG and Xe-HPC architectures adequately addressed this segment. With AXG (accelerated compute group) being split up between the CCG (client computing group) and DCG (data-center group); Xe2-LPG and Xe2-HPG will be developed primarily under CCG, with a client and pro-visualization focus; while Xe-HPC will be developed as a scalar-compute architecture by DCG, which effectively leaves the Intel Arc Graphics team with just two verticals—to deliver a feature-rich iGPU for its next-generation Core processors, and a performance discrete GPU lineup so it can eat away market-share from NVIDIA and AMD—hopefully with better time-to-market.
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May 8th, 2024 02:56 EDT change timezone

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