On Tuesday, Ampere Computing expanded its AmpereOne lineup by introducing six new AmpereOne M processors without much official press coverage or any news. The M-series chips employ a 7228-pin FCLGA socket and house between 96 and 192 single-threaded Armv8.6 plus cores operating at up to 3.60 GHz. Each core includes 2 MB of L2 cache, while a shared 64 MB system cache feeds both compute units and memory controllers. Unlike its predecessors, the new family features a 12-channel DDR5-5600 memory subsystem that supports one ECC-protected DIMM per channel and up to 3 TB of RAM. This design aims to meet the growing demands of cloud and AI workloads that rely heavily on large in-memory processing. Power consumption ranges from 239 W in entry-level models up to 348 W in the flagship A192-32M, which delivers 192 cores at 3.2 GHz. All variants incorporate dynamic voltage and frequency scaling and adaptive voltage control to regulate power draw and maintain efficiency.

On the I/O side, the processors provide 96 PCIe 5.0 lanes with flexible bifurcation options and offer 24 dedicated device controllers to connect accelerators, NVMe storage, and high-speed network adapters. While AMD's EPYC 9965 delivers similar core counts, simultaneous multithreading, and a mature x86-64 ecosystem, Ampere's focus is on memory capacity and bandwidth. By releasing the AmpereOne M series with minimal news coverage, Ampere appears to be laying the groundwork for its next-generation AmpereOne MX platform, which is expected to feature 256 cores, the same 12-channel DDR5 architecture, and a shift to TSMC's 3 nm process. According to Ampere, shipments of the M series began in the fourth quarter of 2024. Softbank, which acquired Ampere Computing in March of this year, is paying $6.5 billion in an all-cash transaction and wants to grab a piece of the enterprise AI deployments. And with CSPs requiring more cores and more bandwidth, Ampere is on the right track.

Broadcom Inc. today announced sample availability of its second generation of wireless connectivity chipset solutions for the Wi-Fi 7 ecosystem, spanning Wi-Fi routers, residential gateways, enterprise access points, and client devices. The new chips build on the ecosystem of products with Broadcom's first-generation Wi-Fi 7 chips while delivering additional functionality to a wider market.

The first chip, the BCM6765, is a highly-optimized residential access point chip that supports 320 MHz 2-stream Wi-Fi operation. This new platform system-on-chip (SoC) allows the productization of Wi-Fi 7 mass-market access points and smart repeater solutions which span the spectrum of cost, form factor, and performance. The second chip, the BCM47722, is an enterprise access point chip that also supports 320 MHz 2-stream operation along with dual IoT radios that support simultaneous operation for Bluetooth Low Energy (BLE), Zigbee, Thread, and Matter protocols. This SoC addresses the growing needs of Internet of things (IoT) applications in the enterprise Wi-Fi market. The third chip, the BCM4390, is a low-power Wi-Fi, Bluetooth, and 802.15.4 combo chip designed for use in mobile devices such as handsets and tablets. It supports 160 MHz 2-stream Wi-Fi operation, dual Bluetooth, and Zigbee, Thread, and Matter protocols to service a broad set of mobile markets.

Marvell today announced OCTEON TX2, the latest family of infrastructure processors targeting a wide variety of wired and wireless networking equipment including switches, routers, secure gateways, firewall, network monitoring, 5G base stations, and smart network interface controllers (NICs). Massive increases in data traffic coupled with escalating requirements for end-to-end security are intensifying the need for highly scalable compute platforms with integrated workload-optimized hardware accelerators to meet performance, power and total cost of ownership requirements. Building on five generations of the industry's most scalable and widely adopted infrastructure processor platform, the OCTEON TX2 family is enabled by a broad software ecosystem including a feature-rich software development kit (SDK) and virtualization support, delivering a unique combination of performance and programmability. The OCTEON TX2 portfolio extends Marvell's industry-leading performance and scalability, delivering a 2.5x improvement over the previous generation and scaling up to 200 Gbps of packet processing throughput.

Following last week's announcement of the ARM Cortex-A50 series, SoC designers formed a bee-line to license the ARMv8 IP. Among them is NVIDIA, and not just for its Tegra line of high-performance mobile chips, but also for Tesla, its GPU compute accelerator line. In an interview with InfoWorld, NVIDIA CTO for Tesla, Steve Scott, was quoted saying, "Tegra is going to become GPU computing capable in the not-so-distant future. Sometime this decade we are also going to start bringing integrated CPUs and GPUs together in the Tesla line". NVIDIA perhaps is looking at building Tesla GPU compute servers with the x86 CPU completely replaced with efficient ARMv8 64-bit processors.